org $600 restart: ; No interrupts sei lda #0 sta $D40E sta $D400 ; Show we are working lda #4*16+2 sta $D01A ; Put all 4 lines as outputs: lda #56 sta 54018 lda #15 sta 54016 lda #60 sta 54018 ; Start by lowering all to 0, wait voltages to drop lda #0 sta 54016 jsr delayBig jsr delayBig jsr delayBig jsr delayBig ; Now, rises VPP for 256 cycles ldx #0 loopVpp: lda #2 sta 54016 sta $D40A lda #0 sta 54016 sta $D40A dex bne loopVpp ; With VPP full on, turn on VDD for 64 cycles ldx #64 loopVdd: lda #6 sta 54016 sta $D40A lda #4 sta 54016 sta $D40A dex bne loopVdd ldy #0 readMem: ; We should be in programming mode now, try reading data ; READ FROM PROGRAM MEMORY is XX0100 -> 000100 -> #4 lda #4 jsr command jsr read14 ; Output to screen! lda $80 sta (88),y iny lda $81 sta (88),y iny ; Increment PC: XX0110 -> 000110 -> #6 lda #6 jsr command jsr read14 ; Ignored cpy #0 bne readMem ; END lda #0 sta 54016 lda #$40 sta $D40E lda #34 sta $D400 cli endLoop: lda $D01F and #1 bne endLoop jmp restart command: ; Push command, 6 bits, LSB first sta $80 ldx #6 commandLoop: lda #7 lsr $80 rol sta 54016 ; 1->CLK C->DATA 1->VPP 1->VDD sta $D40A and #$F5 sta 54016 ; 0->CLK C->DATA 0->VPP 1->VDD sta $D40A dex bne commandLoop rts read14: ; Read data, 14 bits, LSB first lda #0 sta $80 sta $81 ; Put DATA as input lda #56 sta 54018 lda #14 sta 54016 lda #60 sta 54018 sta $D40A ldx #14 dataLoop: lda #14 sta 54016 ; 1->CLK X->DATA 1->VPP 1->VDD sta $D40A lda #4 sta 54016 ; 0->CLK X->DATA 0->VPP 1->VDD lda 54016 lsr ror $81 ror $80 sta $D40A dex bne dataLoop ; Put DATA as output lda #56 sta 54018 lda #15 sta 54016 lda #60 sta 54018 sta $D40A rts delayBig: ldx #0 delayLoop: stx $D40A inx bne delayLoop rts