This is the final section of the score generation circuit, which I call the segment decoder. For each point on the screen, this circuit determines which of the seven digit segments should be enabled.

The segment outputs from 7448 are labeled ‘a’ through ‘g’ and go into the three input NAND gates (C4, D4, D5). Each of these outputs corresponds to a segment of the score as follows.

The other two inputs to each NAND gate will go high when the corresponding segment should be drawn, which will allow the segment enable output to pass through the NAND gate. The top NAND gate (D4), is connected to the ‘f’ segment output, and it’s two other inputs determine when to enable this segment. Pin 13 comes from NOR gate E5, the output of which will be high when 4H, 8H, and 16H are all low. This will enable the two left segments (e, f) of the digit. Pin 1 comes from the output of inverter E4, so it will be high when 16V is low, which enables the top segments (a, b, f, g), so the combination of Pin1 and Pin13 will enable segment f. All the other segments work in a similar fashion. The decoding of the segment positions might seem a little “loose”, but remember that the score holdout circuit will limit the display of the scores to the two areas at the top of the screen, so even though a segment may be enabled elsewhere on the screen, it will only show up where it is supposed to. Finally, all the segment outputs are combined by D3 into the score output which eventually goes to the monitor.