Eagle

Slowly I need to book some space for SN and SN2 cart before we move further. Also we need bit for our SN cart family This is already implemented in our dev MiSTer core Thanks SN Cart2 Registers POINTER_BASE equ $400 MEM0DATA equ POINTER_BASE ;Memory data in/out MEM1DATA equ POINTER_BASE + $01 ;Memory data in/out MEM2DATA equ POINTER_BASE + $02 ;Memory data in/out MEM3DATA equ POINTER_BASE + $03 ;Memory data in/out MEM1ADR0 equ POINTER_BASE + $04 ;Memory address 0 MEM1ADR1 equ POINTER_BASE + $05 ;Memory address 1 MEM1ADR2 equ POINTER_BASE + $06 ;Memory address 2 MEM1ADR3 equ POINTER_BASE + $07 ;Memory address 3 MEM2ADR0 equ POINTER_BASE + $08 ;Memory address 0 MEM2ADR1 equ POINTER_BASE + $09 ;Memory address 1 MEM2ADR2 equ POINTER_BASE + $0A ;Memory address 2 MEM2ADR3 equ POINTER_BASE + $0B ;Memory address 3 MEM3ADR0 equ POINTER_BASE + $0C ;Memory address 0 MEM3ADR1 equ POINTER_BASE + $0D ;Memory address 1 MEM3ADR2 equ POINTER_BASE + $0E ;Memory address 2 MEM3ADR3 equ POINTER_BASE + $0F ;Memory address 3 MEM0ADR0 equ POINTER_BASE + $10 ;Memory address 0 MEM0ADR1 equ POINTER_BASE + $11 ;Memory address 1 MEM0ADR2 equ POINTER_BASE + $12 ;Memory address 2 MEM0ADR3 equ POINTER_BASE + $13 ;Memory address 3 MEM0INC equ POINTER_BASE + $14 ;Memory address increment MEM1INC equ POINTER_BASE + $15 ;Memory address increment MEM2INC equ POINTER_BASE + $16 ;Memory address increment MEM3INC equ POINTER_BASE + $17 ;Memory address increment MEM0DEC equ POINTER_BASE + $18 ;Memory address decrement MEM1DEC equ POINTER_BASE + $19 ;Memory address decrement MEM2DEC equ POINTER_BASE + $1A ;Memory address decrement MEM3DEC equ POINTER_BASE + $1B ;Memory address decrement SN76489 equ $43F SN76489dual equ $43E ; FPGA VGM player for YM2151, YM2612, SN76489 VGMREG equ $462; -- register number VGMPlayer VGMDAT equ $463; -- read/write register VGMPlayer ;VGMREG ;$00 - vgm_control - bit7 = on/off play, bit6 = on/off loop ;$01 - $04 - 32bit vgm_play_address (to vgmdat) ;$05 - $08 - 32bit vgm_loop_address (to vgmdat) YM2612BASE equ $464 ;($464-$467) MemReg equ $FFFF ;bit 0 - lower/upper 16KB ram, bit 1 - mirror ram A8, bit 2 - mirror ram A9, bit 3 - reserved, bit 4 - mirror A8/A9 only for lower 8KB ram ;************* 4KB banks* *********************** $8000 -> write 0-255 (select 4KB bank from 0-255) $9000 -> write 0-255 (select 4KB bank from 0-255) $A000 -> write 0-255 (select 4KB bank from 0-255) $B000 -> write 0-255 (select 4KB bank from 0-255) $C000 -> write 0-255 (select 4KB bank from 0-255) $D000 -> write 0-255 (select 4KB bank from 0-255) $E000 -> write 0-255 (select 4KB bank from 0-255) $Fxxx - it's fix

Not yet, but anyway you will need SN2 cart

Asteroid for SN2 cart with YM2612 and hardware VGM player 20230830_225812.mp4

Also we need remember that other FPGA projects are coming for cheaper boards. MiSTeX https://github.com/MiSTeX-devel 🤞

And it’s FPGA base on MiSTer

Software emulation? No thanks. Better to spend money on MiSTer.

HDMI ❤️

We should have FPGA VGM player, not extra Maria. But I’ll have big surprise and you will be more than happy 😃

I'm checking bit ReadyYM (bit YM2151BASE+1) but looks like it's not working and I'm writing registers to early 🤔 I have to put Wsync to delay writing and sounds ok.

Hi @raz0red Did you change something with YM2151 recently? Because sound little weird now. example https://raz0red.github.io/js7800/?cart=https://forums.atariage.com/applications/core/interface/file/attachment.php?id=1018155&key=e4efda497a66e8c7ea02ff850272d15c Real HW (from about 20sec) EDIT: I checked emulator A7800 and it's playing fine.

https://demozoo.org/productions/328091/ by @karri

MariaEci - FPGA VGM player Yamaha 2612 + SN76489 We should have this in SN2 cart and MiSTer very soon. So now we can have vgm in game music from Yamaha 2151 or 2612 Btw SN2 cart for devs will have SD card IMG_2871.MOV