Artoj

March 16

Hi All, here is my current JoyRS232 version 3, the software will be ready soon as it is finished, similar to Joytalk. It will allow 2 way communication with it as well. Regards Arto.

March 16

Will Send an Update on JoyRS232 soon.

March 15

42 minutes ago, Tornadoboy said:

Are the gerbers and parts placement diagrams available for download somewhere for any of these boards?

When all the boards are tested and built (final version), all the relevant files will be made public. At present I have only partially built about 4 boards and found errors on a few others. If I feel confident about the work, I will make that available ASAP. I am itching to get back to the soldering iron to finish my work, as my workshop is not completed, I have been looking at making a catalogue of all the TI99 work and my Ternary work available soon. If you want a particular board that I have been working on, just let me know, I use EasyEDA software and will post it here (Atariage) so everyone can have a go at it. Regards Arto.

March 15

Hi All, here is my latest update on the SAMS MiniPEB Memory card, I found a few errors and missing connections. This is Version 3.0, the next update should be the final, Regards Arto.

March 13

Hi All, Here is the update for the Parajoy v1.1, regards Arto.

March 13

Hi All, I have some software listings for the Parajoy, the first one is a typewriter, that uses no assembly. Goodman did a great job designing a usable parallel port from the joystick port, it is slow but does the job. The assembly routine speeds thing up and makes it easy to use. I have added the line from pin 8(joy) to pin11(LPT-busy) to my latest update. Here are my retyped listings, regards Arto.

10   REM ***************
11   REM * TYPE WRITER *
12   REM ***************
13   DIM B(8)
20   FOR I=1 TO 8 :: B(I)=128/2^I :: NEXT I
30   REM **** INPUT ************
40 CALL KEY(4,K,S)
41   IF S=0 THEN GOTO 40
42   CALL M(K,B()) :: GOTO 40
49   REM ****JOYSTICK ROUTINE **
50   SUB M(K,B())
51   FOR I=1 TO 7 :: Y=K-B(I)
53   IF Y<0 THE GOTO 60 :: K=Y :: CALL JOYST(2,Y,Y)
60   CALL JOYST(1,Y,Y)
61   NEXY I :: SUBEND

100   CALL INIT
110   CALL LOAD("DSK1.MSLINK5")
120   OPEN #1:"DSK1.ANYDISPLAYFILE",VARIABLE 80, INPUT
125   REM **** SET UP YOUR TYPE SIZE ETC FOR YOUR OWN PRINTER
126   REM **** BELOW IS SMALL TYPE FOR CGP-115 PRINTER
130   CALL LINK("MSLINK",CHR$(13)&CHR$(18)&CHR$(13)&"S0"&CHR$(17)&"A")
132   REM ***** PRINT YOUR FILE
135   FOR I=1 TO 1000
140   LINPUT #1:A$
150   CALL LINK("MSLINK",A$&CHR$13))
155   NEXT I
160   END

MSLINK IS THE MAIN ROUTINE
VPLINK IS A SCREEN DUMP TO THE PRINTER

DEF MSLINK,VPLINK *DEFINITIONS
VMBR EQU >202C *MULTIPLE BYTE READ
STRREF EQU >2014 *STRING PARAMETER RETRIEVE
EVEN
HF DATA >FFFF *BUFFER #1
HM BSS 2 *BUFFER #2
HL BSS 2 *BUFFER #3
HK BSS 2 *BUFFER #4
BR BSS 256 *ARRAY STRING HOLDING CHARACTERS TO PRINT
MSLINK *MAIN ROUTINE TO PRINT STRINGS TO 255 CHAR
LIMI 0 *DISABLE INTERRUPTS FROM VDP
MOV R11,@HK *SAVE RETURN TO XBASIC
CLR R0
LI R1,1
LI R2,BR *LINK FIRST ELEMENT TO BUFFER BR
MOVB @HF,*R2 *CHECK FOR MAXIMUM LENGTH
BLWP @STRREF *LOAD STRING FROM MSLINK ROUTINE TO BR BUFFER
MOV R2,R7 *TRANSFER ADDRESS TO REGISTER 7
MOVB *R7+,R8 *MOVE LENGTH OF STRING TO REGISTER 8
SRL R8,8 *SHIFT RIGHT 8 POSITIONS FOR PROCESSING
LI R9,8 *DUTY CYCLE FOR BIT TIME OF MSG (8 ON 8 OFF)
LI R12,36 *PREPARE CRU TO READ JOYSTICK PORTS
LI R0,>0050 *INTERSYMBOL DELAY TIME IS 50 CYCLES/RESET
MOV R0,@HL *SAVE DELAY TO BUFFER ML FOR FUTURE USE
BL @NL *LINK TO PRINT ROUTINE NL
MOV @HK,R11 *PRINTING ALL DONE NOW RETURN TO XB
B *R11 *RETURN TO XB
NL EQU # *NL IS THE PRINT SUBROUTINE
MOV R11,R10 *SAVE SUBROUTINE LINK IN REGISTER 10
NM MOVB *R7+,R1 *FETCH NEXT BYTE FROM BUFFER PUT IN REGISTER 1
SRL R1,8 *RIGHT POSITION ASCII BYTE FOR PROCESSING
CI R1,124 *COMPARE BYTE WITH "124" ASCII CHAR "1" (224)
JNE NF *IF IT IS "124" THEN CAUSE A CARRIAGE RETURN
LI R1,13 *LOAD REGISTER 1 WITH ASCII 13 FOR CARRIAGE RETURN
NF EQU # *SUBROUTINE TO DUMP BITS TO JOYSTICK PORTS
LI R4,8 *LOAD REGISTER 4 WITH INDEX COUNTER-8 ASCII BITS
NT EQU # *NEXT BIT TO BE PROCESSED - LOAD CRU W ON/OFF
SRC R1,1 *SHIFT THE NEXT BIT INTO LOW ORDER POSITION
JNC BQ *IF CARRY IS A "0" THEN JUMP TO BQ
LI R5,>0700 *CARRY MUST BE "1" SO SELECT CRU 7 (JOY PORT 2)
BL @DY *BRANCH TO DELAY HOLD JOY, IN PRESENT STATE
BQ LI R5,>0600 *BIT MUST BE A "0" SO SEND CLOCK (JOY PORT 1)
BL @DY *BRANCH TO DELAY HOLD JOY, IN PRESENT STATE
DEC R4 *DECREMENT THE ASCII INDEX COUNTER
JNE NT *THROUGH WITH 8 BITS? IF NOT BRANCH BACK TO NT
MOV @HL,R3 *ALL THROUGH SO LOAD INTERSYMBOL DELAY R3
BZ DEC R3 *DELAY SO HARDWARE IN MODULE CAN RESET

JNE BZ *NOT EQUAL ZERO SO BRANCH TO BZ
ZD TB -12 *CHECK THE DOWN LINE - IS THE PRINTER BUSY? ***NOTE 1***
JNE ZD *MUST BE BUSY - BRANCH ZD
DEC R8 *HAVE ALL CHARACTERS BEEN TRANSMITTED
JNE NM *IF NOT THEN BRANCH TO NEXT LETTER - NM ROUTINE
B *R10 *RETURN CONTROL XB - ALL DONE
DY EQU # *DELAY SUBROUTINE WHICH LOADS CRU JOYSTICKS
LDCR R5,3 *LOAD JOYSTICK 2 OR 1 SET THE PIN HIGH
MOV R9,R5 *LOAD DELAY COUNTER REGISTER 5 WITH COUNTDOWN
DZ EQU # *DELAY FOR 8 BITS IN HIGH STATE
DEC R5
JNE DZ *DONE WITH 8 BITS?
LI R5,>0500 *LOAD DELAY COUNTER REGISTER 5 WITH COUNTDOWN
LDCR R5,3 *LOAD CRU WITH PHANTOM ADDRESS FORCE PIN LOW
MOV R9,R5 *LOAD INDEX COUNTER REGISTER 5 WITH COUNTDOWN
DQ DEC R5 *DELAY IN LOW STATE/SEND A SQUARE WAVE
JNE DQ
B *R11 *BRANCH BACK TO CALLER ROUTINE
VPLINK *PRINTS A PAGE OF VIDEO SCREEN TO PRINTER
LIMI 0 *DISABLE INTERRUPTS
MOV R11,@HM *SAVE LINK TO BASIC IN BUFFER NM THIS TIME
CLR R0
MOV R0,@HK *SAVE "0" IN BUFFER MK
LI R9,8 *INITIATE INDEX CLOCK (ASCII BIT CLOCK) AT 8
LI R12,36 *SET CRU LOAD POINT ( REFER ED ASS P408)
CLR R6 *REGISTER 6 IS THE SCREEN LINE COUNTER INITIALLY "0"
LI R3,>0050 *LOAD INTERSYMBOL DELAY OF HEX 50 INTO REGISTER 3
MOV R9,@HL *STORE DELAY IN BUFFER HL FOR FUTURE USE
JQ LI R5,30 *REGISTER 5 IS SET TO 30 WHICH IS THE MAX NUMBER OF ASCII CHARS/LINE
LI R1,BR *BR IS THE ADDRESS WHERE WE SEND OUR ASCII CHAR
MOV R1,R7 *COPY DUMP ADDRESS TO REGISTER 7
A R5,R7 *INITIATE ADDRESS AT THE LAST CHARACTER IN LINE
LI R2,31 *GET READY TO READ LINE OF CHARACTERS FROM THE SCREEN
BLWP @VMBR *OK GO GET THE CHARACTERS FROM THE SCREEN
LI R4,>8000 *HEX 80 IS CHARACTER SPACE WHICH INCLUDE 60 OFFSET
BJ MOVB *R7,R0 *MOVE THE CHARACTER(LAST TO FIRST) TO REGISTER 0
DEC R7 *DECREMENT REGISTER 7 IN PREPARATION TO READ NEXT CHAR
DEC R5 *DECREMENT REGISTER 5 WHICH IS THE INDEX COUNTER FOR LINE CHAR
CB R0,R4 *COMPARE THE INCIDENT CHARACTER WITH HEX 80
JEQ BJ *A SPACE CHARACTER? DON'T PRINT TRAILING SPACES.
AI R7,2 *ALL DONE REMOVING TRAILING SPACES SO ADD 2 TO R7
AI R5,3 *ALSO FIX REGISTER 5 SO THAT THE CORRECT NUMBER/PRINT
LI R4,>6D00 *LOAD THE RETURN CARRIAGE CHARACTER INCLUDE OFFSET
MOV R4,*R7 *LOAD IT IN THE LAST CHARACTER POSITION IN BUFFER
MOV R5,R8 *LOAD NUMBER OF CHAR TO PRINT IN REGISTER 8
LI R4,>6000 *LOAD R4 WITH BASIC SCREEN BIAS HEX 60
FF SB R4,*R7 *GET RID OF THE SCREEN BIAS IN THE CHARACTERS
DEC R7 *DECREMENT R7 WHICH IS INDEX
DEC R5 *DECREMENT R5 WHICH IS ALSO AN INDEX
JNE FF *ALL DONE REMOVING SCREEN BIAS IF NOT GO TO FF
MOV R1,R7 *MOVE ADDRESS OF FIRST CHARACTER IN BUFFER TO R7
BL @NL *BRANCH TO MSLINK ROUTINE TO PRINT THE LINE
INC R6 *REGISTER 6 IS LINE COUNTER ADD 1 TO IT FOR NEXT LINE
CI R6,22 *HAVE 22 LINE BEEN PRINTED? IF SO THEN BYPASS
JEQ JV *THE ROUTINE THAT SETS UP THE NEXT LINE
MOV R6,R0 *SAVE REGISTER 6 IN REGISTER 0 FOR PROCESSING THE NEXT LINE
SLA R0,5 *MULTIPLY OFFSET BY 32 TO GET TO THE NEXT LINE
JMP JQ *JUMP TO THE JQ ROUTINE TO PROCESS THE NEXT LINE
JV MOV @HM,R11 *RECALL RETURN TO XBASIC CALLER
B *R11 *RETURN CONTROL TO XB
END

* THE SEQUENCE IS AS FOLLOWS:
* 1) LOAD THE 30 BASIC CHARACTERS THE SCREEN (VDP) TO THE 255 CHARACTER BUFFER BR
* 2) GET RID OF THE TRAILING BLANKS ON THE LINE, THEY WASTE PRINTING TIME
* 3) GET RID OF THE HEX 60 SCREEN OFFSET
* 4) POSITION A CARRIAGE RETURN SYMBOL AT THE END OF THE LINE
* 5} USE THE MSLINK ROUTINE TO PRINT OUT THE LINE
* 6) REPEAT THE PROCESS UNTIL ALL 22 LINES HAVE BEEN PRINTED
* COPYRIGHT 1983 BY G.A. BOWMAN, VERNON HILLS, ILLINOIS

* NOTE 1 **** CONNECTION NOT SHOWN ON ORIGINAL INTERFACE

DATA|
.----|-----------.
| 1 2 3 4 5 |
\ 6 7 8 9 /
\____|__|___/
| |
CLOCK| |DOWN (TB-12)
|
'----------------------PIN 11 (BUSY) ON DB25 - IT HAS BEEN ADDED BUT NOT TESTED

March 11

Hi All, I have been busy refurbishing my very neglected XJ900F and about 100 other things as well (I cracked the Ternary Multiplier puzzle). I found the time to redraw from rough sketches of Mr Bowmans Joystick parallel port and his Whopper 64K cartridge. I hope to build these along with my other designs very soon. Here are all the pics. regards Arto.

March 1

Wow, what a enlightening thread!! Thanks for all the insights! I have to reply now, I have been hunkering down on my Ternary hardware sections, Sum, Carry, Any, Half Adders and finally a Full Adder giving me a 3 Trit Addition, to add to my list of Instructions I want to implement. I am currently bashing a diamond nail into the Ternary Multiply circuit, whew it is a hard cracker!, as there is no manual of 'how to' book. I will eventually make the process as transparent and easy to understand. I learned so much from looking at the Bit Sliced version of a 9900 implementation that uses 4x74S481 and a 74S182. So I figured if you want to emulate hardware, make the software look and act like the hardware. So I created a spread sheet that does just that, it could be instructive to even build a small 4 bit binary CPU doing just that. Regards Arto.

Here is the bit sliced version of a 9900. Also one of my software versions of a Ternary Full Adder.

January 3

Hi All,

As I walked into my "Manshed" a small slip of dot matrix printed paper floated down in front of me, I picked it up and it was an XBasic single line program that I must have created back in 1984, so here it is:

1 CALL KEY(0,K,S):: X=X-(K=68)+(K=83)-(X<2)+(X>31):: Y=Y-(K=88)+(K=69)-(Y<2)+(Y>23):: CALL HCHAR(Y,X,30-(K=32 OR K=51)*2,1-(K=51)*768:: GOTO 1

So here is a chance for all those single line XB programs that are actually a complete program to be listed. The proviso is it must comply with standard TI99 XB cartridge. If you have other types of enhanced XB, please include them but make it known what you used and the special CALL or Function that make it unique. Regards Arto

December 31, 2023

I am not sure where the A1 line is either, I think retrocanada76 might means A1 line on the Tang? With the TI99 the A0,A1,A2 are used for encoding CSW CSR on the TMS VDP chip. Ricky is right A1 is A14 on the TI99 and it is connected to pin 13 on the TMS VDP chip (mode). Regards Arto.

December 30, 2023

18981119-scientific-american-01-001.jpg?

December 29, 2023

9 hours ago, Stuart said:

The "1nF" label for C1 towards the top left has wandered down to by R1 ... if you hadn't noticed. Is the blue layer a solder mask ... that is covering the PCB finger traces?

Thanks Stuart, I only noticed this after I posted the pic, it's all fixed.

6 hours ago, acadiel said:

We could make two options for the board - one for just the ROM (all banking on that one chip), and one board could also have an Ubergrom. The pinout for the chip could even have some sort of standard pinout too.

I figure 32MB using the max address lines ought to keep most folks out of trouble before delving into the bank switching using the data lines (like Dragon’s Lair) to get above that. Just imagine the mega cart we could build there with 32MB….. 🙂

Excellent ideas and it is certainly valuable to simplify, these ideas need to be pursued at some point for all TIers. When I started looking at making a cart, I decided to make sure it can be used by the most basic 8K Eprom, at lot of my work is based on the 2764 Eprom, I have designed an Eprom emulator using just switches. (pic1, pic2)

I am laying ground so I can design a Ternary memory system at some point in the future. I am still working on a Rope Core memory for the same project, here are my prototypes (pic3). The final pic is a Ternary Rope core memory design. (pic4) Regards Arto.

December 28, 2023

3 hours ago, matthew180 said:

It is like the wild-west of software development is leaking over into more traditional areas of science and engineering and causing erosion.

Just a note, in the 1960's ( I was a young lad LOL) I looked and studied old radio/TV valve schematics and they made a lot of sense, I used that way of doing things by hand until computer CAD came along, it can make you lazy, so you must stick to what works, not just for yourself but others who will venture into your "schemes" and try to decipher them. Just like when notating assembly, or complex algorithms in other languages, spend the extra time to explain your choices. I try to avoid nets, but you have no choice at times, when you have too many cross connections. Great topic, I am still testing out KICAD, regards Arto.

December 27, 2023

37 minutes ago, Alessio Iodice said:

Do you also write books?

I published my first novel in 2018 (unfortunately only in Italian), it is a novel set in Venice in the 16th century.
Briefly: After the Portuguese discover the routes south to Africa the Venetians and Ottomans agree to dig the Suez Canal.

Nice work Alessio, what's the title? I do have a few draft novels, still not completed as yet. I am also song writer and have one Song book published so far, 3 more Song books in the draft stage, they are only about 20-30 pages, as each song is illustrated and is on a single page.

It is great to see the breath of talent in these forums, I do have a current project I will be working on with another Artist, it is an Illustrated Novel (Comic Book LOL), set in many time periods and has much to do with a single entity and their journey of enlightenment. As you know there is much work to do in the broad historic research you must complete, it is as much a part of writing a novel as it is writing a text book. Regards Arto.

December 27, 2023

Hi All,

Thanks for all your help, I now have the first prototype ready, regards Arto.

December 27, 2023

December 26, 2023

4 hours ago, Ksarul said:

You can eliminate a chip by switching to a 74LS377

Thank you Ksarul, about a year ago I did a complete cartridge design using the 377, for the life of me I cannot find any one of the files, so I went back to the original work and used the 379 as was used by Guidry and this time saved many other versions as well. I have V3 marked as the 377 use. Thank you again, I will post the update soon, regards Arto.

December 26, 2023

5 hours ago, dhe said:

What is it about?

I do enjoy the hands on approach to using computers and do not own a mobile phone, I know too much about RF to allow it destroy my sensibilities, LOL.

As the Author, my simple synopsis might be enough:

A compilation of diverse studies in the underlying designs and principles behind the Arts and Sciences, taken from an Artists perspective on the world he studies. A book where Art, Engineering and the ancient world meet. Highly illustrated, with artwork, numeric tables, geometries, designs and schematics. This is Volume I.

https://www.amazon.com.au/Talking-Birds-Compilation-Studies-Artwork/dp/1876406038/

I finished writing it in 2013, while I also had two more volumes almost complete by 2016, the madness I had written about actually occurred. I suspended publishing and decided to further my many studies in more detail and outline a new approach to the multitude of broken scientific,artistic and technical issues that have plagued our institutions. I am not alone in all my endeavours and found much commonality with the Retro computing, fringe science, alternate history and traditional artistic communities. We are at the precipice of a new paradigm in the Arts and Sciences and the road is still being mapped, all I can say is I just keep my head clear, work hard and let the law of reciprocity and karma be my guide, while I keep a stern hand on the truth, and allow the current world events to unfold. Regards Arto.

December 26, 2023

Hi All,

Here is another unfinished project, here is the schematic, please look for problems as I am almost finished. I must thank S. Conner, M. Brent, C. Randolph and J. Guidry for their hard work. Regards Arto.

December 21, 2023

7 hours ago, Alessio Iodice said:

WOW!

I'm waiting for schematics

Hi, as you can see by my latest posts, I had to sort out the first prototypes. The current version should have no issues, I am still deciding on a section in front of the boards where I could incorporate a whole standalone TMS9995 (or TMS99105 or FPGA) that can run everything without the 4A attached, so many possibilities and so little time LOL. I am also in the process of designing a AT motherboard form factor with the Mini cards, TI PEB cards and a single 16 bit IBM ISA card slot, and maybe a TI99/4A mother board slot or an extension for a S100 card slot, this is not a priority at all but has taught me much. This all should fit inside a standard AT case. I am also writing a DSR for my Ternary PIO project and learning GPL and Just having some fun until my workshop is finished, all schematics will be released as soon as the hardware is bullet proof. Some of these projects are revivals from over 30 years ago.

My main focus is on making a Ternary Logic/Computer Kit (as a teaching aid), this has been a long term goal all the rest are just additions and iterations, the TI99 just happened to be a great system to inter-grate and formulate a binary/ternary interface. As I have 2 more Volumes (300 pages each) to be released next year, from my book series "Talking to the Birds", which I had to put aside as the psychopaths of the world decided to push us down a dark alley for their nefarious ends. Within it's pages I was going to release my basic work on the Ternary Logic System, now covering at least 4 chapters, where now I am considering making a separate book, with much on interfacing binary, which I must include the TI99 as the target binary system. As I am self taught, I am both a student and teacher of this topic, which is only covered in a highly abstracted and a mathematically symbolic way that is highly esoteric and not quickly digestible. I hope to simplify and remove it's cloak of mystery, so we can make nuts and bolts reality, so I start with relays.

On that note the TI99 has taught me how to design a functional computer system and I am in awe of the many that are here at Atari Age that are still making fantastic contributions to a so called "orphan", where in reality it was one of the vanguards that pushed the home computer into common knowledge and with it, a deep understanding of its technology, how fast we learn when we are given the right tools. Regard Arto

December 20, 2023

Here is the Pin Header.

December 20, 2023

Hi All,

I have just updated the Mini PEB Expansion and fixed the pin spacing to include the PI PICO or a ATmega32, while you can now choose to power each card from the external or the card edge power. One more short card I have yet to finish has header pins so you can connect the PICO/ATmega to the TI Bus. Regards Arto.

December 11, 2023

Hi Jason,

I am still working on a Pico board for the side port but I am far too busy with my other projects (Ternary CPU), as I am from Sydney, I am glad you're only 2 hrs away, so getting one of your boards would be a easy transport. I haven't finished my workshop yet, so I am just gathering a lot of parts, materials and prototypes into project cartons, I hope to start a channel etc when I am done. It is great to see another user go for this board, it has so much potential for the TI99. I will be following your progress keenly, Regards Arto.

December 11, 2023

Hi All,

I have read just about all the posts about connecting the PAL video output to a Monitor. I have so many options, the mind boggles, I found a simple unit like this:

I have a PAL 6 Pin output on my TI99/4A, so all I would need is an spliter/adaptor cable from the TI to connect it and then use a HDMI monitor. Has anyone used one of these? I am asking now before I purchase it.

December 8, 2023

As I cannot edit my words, "your" is an edit not "you". I am learning a lot of the things I did not understand in 1986. As Assembly was my mantra to control the TMS9900 and the VDP. The GPL language was not on my horizon as Assembly meant control and clarity. Now I see GPL, CRU and other aspects of TI's foray into the outer boundaries of the CPU as ways of teaching us how to make control of mechanisms as a way to push boundaries of understanding not just as a CPU design. The ideas of Ternary computing was present in their approach. The Binary paradigm has now been over and ternary computing was to be the new thing, as shown in Quantum Computing. As an artist I only interpreted the timeline so I can understand my position in its movement, 1986 to 2022, this is a large gap where a lot of life that has occurred. This is why I pursue Ternary ideas in relation to computing, life has taught me to always look at the third option. Regards Arto.

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