New "SMART" RAM design for atari 2600 16K bankswitch

[+grafixbmp]

This is something I just came up with and it is also rather late for me but I can't sleep untill I get this off my chest. Most would agree that the NES and SNES had more hardware upgrades to catridges than the 2600 so there shouldn't be anythng wrong with some more for the 2600.

 

I designed this to work with the basics of a standard 16K bankswitched cartridge design but I bet it could easily work with other sizes too. The thing is that I designed this, but someone else needs to design the chip and send it to fabrication if it could be popular to programers. I am so sure that many would be eagar to use it in their projects including me.

 

With a standard 16K rom there are certain addresses that jump to each of the diffrent banks which is the same for each bank. This new "smart" RAM which is a total of 1K works as follows. Each bank has 9 adresses near the end where the banswitching addresses are, The first is an incremental director which I will get to later. The others are grouped into pairs. groups 0, 1, 2, and 3. These refer to 4 separate RAM banks where each have 256 bytes RAM. The first byte of each of the 4 pairs is the address pointer. This is where you can set the current address for the RAM pointer for that bank by just ST any value from 0 to 255. You can also LD the current address that bank is pointing to. This is where you can either ST or LD the second address from the 4 pair groups and load or store from the RAM byte you specified in the previous address for each of the 4 RAM banks. Now the best part is, everytime you LD the RAM byte you want from that address, the address for the RAM will either increment or decrement by 1 address. This is the same for an ST as well. The first address of the 9 I mentioned earlier is the cremental director which is broken as such, the first 4 bits refer to LDs and the last 4 bits refer to the STs for each of the 4 banks. You can LD or ST this too. If any are 0s thoes decrement, if any are 1s thoes increment. You wind up with independant movement between LDs or STs. So now is the time for a breakdown.

 

For each of the 4 main banks you have 9 addresses that are used:

 

The first is the crememtal director LD bank 0, bank 1, bank 2, bank 3 ST bank 0, bank 1, bank 2, bank 3

the second is the address pointer for bank 0

the third is the bank access for bank 0

the fourth is the address pointer for bank 1

the fifth is the bank access for bank 1

the sixth os the address pointer for bank 2

the seventh is the bank access for bank 2

the eighth is the address pointer for bank 3

and the nineth is the bank access for bank 3

 

No matter which regular bank you are in, everyone of them will have the same data in the 9 addresses for the "SMART" RAM banks.

 

I thought this idea was just too cool to pass up posting. I am passing this along to ANYONE intrested in this upgrade for extra ram for the atari 2600. If you find it useful anywhere else, go ahead, be my guest but I would love to get my hands on it for the 2600 if it ever becomes a reality. Would love to hear what anyone things of it. I just felt that something like this was long over due.

 

Well scratch that one. I thought it was nice that it took up less addresses and that it auto incremented or decrememtned just by reading the same address over and over again. Seems like alot of bankswitching schemes out there use a large chunk of addresses from each bank just to move around or mirror. I was thinking about less intrusion into the current simplest bank types. Guess most would think 4A50 would be better as well so just ignore this.

Edited May 16, 2008 by grafixbmp

[supercat]

I guess I'm not quite clear how what you're proposing is better than existing schemes. It sounds like it's going to require more latching and decoding than 4A50, while providing less versatility.

[Bruce Tomlin]

I've got to agree. Putting auto-increment stuff in there makes the hardware a lot more complicated. And four of them? Even a cheapo ripple counter needs one D flip-flop per bit, for a total of 32 D flip-flops just for the incrementers.

[supercat]

I thought it was nice that it took up less addresses and that it auto incremented or decrememtned just by reading the same address over and over again. Seems like alot of bankswitching schemes out there use a large chunk of addresses from each bank just to move around or mirror. I was thinking about less intrusion into the current simplest bank types. Guess most would think 4A50 would be better as well so just ignore this.

 

Pitfall II has some hardware somewhat like what you describe, but that's all done with custom silicon. And Batari is working on an ARM-based cart that might be able to do some such things. In designing a scheme, though, it's important to figure out what will work well in both hardware and software, and know how things will be implemented with each.