+Omegamatrix Posted May 21, 2008 Share Posted May 21, 2008 I've read this on the net: A page boundary crossing occurs when the branch destination is on a different page than the instruction AFTER the branch instruction I'm left wondering if they mean the sequence the instructions are executed in or their placement in the rom code? For example. F0F9: DEC $A6 ;5 LDA $A6 ;2 CMP #$30 ;3 F0FF: BNE F0F9 ;2³ or is it 2³+1?? F101: NOP ;2 By the next instruction do they mean the NOP, which is the next instruction in the rom code, or do they mean the DEC which is the next instruction taken (when the branch is not equal)? Also what page is the BNE instruction technically on in the example? The opcode is at F0FF, but the address is stored at F100. Quote Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted May 21, 2008 Share Posted May 21, 2008 The NOP is the next operation and DEC $A6 is the destination. Quote Link to comment Share on other sites More sharing options...
+batari Posted May 21, 2008 Share Posted May 21, 2008 They would mean whatever instruction is after the NOP. This is because a BNE F101 would be encoded as D0 00 (which is quite a useless operation, but that's beside the point.) When a branch is taken, the operand is added to the PC, but if the operand is zero, the carry would never be set. Does that make sense? Quote Link to comment Share on other sites More sharing options...
SeaGtGruff Posted May 21, 2008 Share Posted May 21, 2008 I've read this on the net: A page boundary crossing occurs when the branch destination is on a different page than the instruction AFTER the branch instruction I'm left wondering if they mean the sequence the instructions are executed in or their placement in the rom code? For example. F0F9: DEC $A6 ;5 LDA $A6 ;2 CMP #$30 ;3 F0FF: BNE F0F9 ;2³ or is it 2³+1?? F101: NOP ;2 By the next instruction do they mean the NOP, which is the next instruction in the rom code, or do they mean the DEC which is the next instruction taken (when the branch is not equal)? Also what page is the BNE instruction technically on in the example? The opcode is at F0FF, but the address is stored at F100. Yes, that is a page crossing. The instruction after the branch is the NOP at $F101, so the branch to $F0F9 would end up being assembled as a branch to -8 (negative 8 bytes, or 8 bytes backwards from $F101). When -8 is added to $F101, the result is $F0F9, which is on a different page than $F101, so a page crossing occurs, meaning the branch takes 4 cycles to execute instead of only 3 cycles. (For a branch, it takes 2 cycles if the branch is *not* taken, or 3 cycles if the branch *is* taken, or 4 cycles if the branch is taken but a page boundary is crossed.) Michael Quote Link to comment Share on other sites More sharing options...
+Omegamatrix Posted May 21, 2008 Author Share Posted May 21, 2008 This makes more sense. I just also realized too that they are adding the PC with the two's complement of where they want to get to (for the low byte). Last night I was trying to figure out where they were getting all those weird numbers from following the opcode instead of addresses. I guess that is why you can only go -128 to 127 with a branch instruction. Batari it makes sense but for another example? Did you read the BNE F0F9 as BNE F101 by mistake or am I missing something here? Thanks for all the help. Jeff Quote Link to comment Share on other sites More sharing options...
SeaGtGruff Posted May 22, 2008 Share Posted May 22, 2008 I guess that is why you can only go -128 to 127 with a branch instruction. Exactly! Michael Quote Link to comment Share on other sites More sharing options...
SeaGtGruff Posted May 22, 2008 Share Posted May 22, 2008 Batari it makes sense but for another example? Did you read the BNE F0F9 as BNE F101 by mistake or am I missing something here? No, he was saying that *if* the branch were going to $F101, then that would be an offset of 0 bytes-- i.e., neither forward nor backward-- since $F101 is the address immediately *after* the branch instruction, and thus is the "0 point" so to speak. To give another example, suppose you have the following code: LDA #0 infinite_loop BEQ infinite_loop next_byte NOP In this case, the branch instruction is going back to itself-- to the first byte of the branch instruction-- so it would be the same thing as "BEQ -2" (branch backwards 2 bytes). On the other hand, "BEQ next_byte" would be the same as "BEQ 0" (branch 0 bytes). Of course, the instruction is usually coded using the label of the address you want to branch to, rather than the offset or displacement value-- and trying to use "BEQ -2" or "BEQ 0" in your assembly program would presumably generate an assembler error if your assembler assumes that the argument of the branch is a label or target address, rather than a displacement value. Michael Quote Link to comment Share on other sites More sharing options...
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