Antic differences - original, XL, XE

[Rybags]

Does anyone have documentation (official or otherwise) of the functional differences of Antic, among 400/800, XL, and XE releases?

 

As I understand it, the only difference is the method/range of Refresh Addresses they generate.

 

So... would compatability issues crop up if you try one in a non-matching machine:

- newer ANTIC in 400/800... would the Refresh be too slow since each row is probably refreshed less often (and these machines typically had older tech RAM which needed more frequent refresh) ?

 

- 400/800 Antic in XL... would a significant part of RAM lose contents because the rows aren't being refreshed?

 

- XL Antic in XE... would issues only exist for systems > 64K?

Edited November 10, 2009 by Rybags

[+warerat]

Does anyone have documentation (official or otherwise) of the functional differences of Antic, among 400/800, XL, and XE releases?

 

As I understand it, the only difference is the method/range of Refresh Addresses they generate.

 

So... would compatability issues crop up if you try one in a non-matching machine:

- newer ANTIC in 400/800... would the Refresh be too slow since each row is probably refreshed less often (and these machines typically had older tech RAM which needed more frequent refresh) ?

 

The older 16Kx1 and *some* 64Kx1 DRAMS needed to refresh 128 rows in 2ms. The newer ANTIC does work on the 400/800 because while its address counter during the refresh cycle updates A0-A7, only A0-A6 exist on the 16Kx1 DRAM.

 

- 400/800 Antic in XL... would a significant part of RAM lose contents because the rows aren't being refreshed?

 

Yes if it has older 64Kx1 DRAM and no if it is expanded. This is why there are some XLs with 64K and ANTIC "D" with no problems depending on the type of DRAM installed. NEC/Fujitsu 64Kx1 DRAMs needed only 128 rows. Consequently some of the earlier memory upgrades for the XL had option to add the extra bit of the address with an external counter and register. The row count are refresh requirement are proportional.

 

- XL Antic in XE... would issues only exist for systems > 64K?

 

ANTIC "D" (CO12296/CO14887) were used for 400/800/early XLs. ANTIC "E" (CO21697/CO21698) was the same for XE's and newer XL's. XE's usually had the newer Micron MT4264 which needed 256 rows refreshed in 4ms (like the newer 256Kx1). So you can't plug in an ANTIC "D" for an XE with 4ms refresh DRAM.

Edited November 10, 2009 by warerat

[analmux]

- 400/800 Antic in XL... would a significant part of RAM lose contents because the rows aren't being refreshed?

Yes if it has older 64Kx1 DRAM and no if it is expanded.

I had a 600xl once, took its Antic and placed it into an 800xl.

IIRC this indeed caused refresh problems.

The 600xl of course has only 16kB, so 7bit Row/Column is enough.

 

...just to make clear that the refresh of the Antic chip in the 600xl is (If I'm correct) also 7bit.

[+warerat]

- 400/800 Antic in XL... would a significant part of RAM lose contents because the rows aren't being refreshed?

Yes if it has older 64Kx1 DRAM and no if it is expanded.

I had a 600xl once, took its Antic and placed it into an 800xl.

IIRC this indeed caused refresh problems.

The 600xl of course has only 16kB, so 7bit Row/Column is enough.

 

...just to make clear that the refresh of the Antic chip in the 600xl is (If I'm correct) also 7bit.

 

Early 4416 allowed 7-bit refresh. Newer 16Kx4 (like TI TMS4416) devices and others (64Kx4, 256Kx4) need the 8-bit 4ms refresh. But yet I have 1200XLs with 64K and the old ANTIC.

[+x=usr(1536)]

Yes, I'm aware that this is a nine-and-a-half-year-old thread. The glee and gusto which with I've dug it up in order to ask a question is astounding

 

I had a 600xl once, took its Antic and placed it into an 800xl.
IIRC this indeed caused refresh problems.
The 600xl of course has only 16kB, so 7bit Row/Column is enough.

...just to make clear that the refresh of the Antic chip in the 600xl is (If I'm correct) also 7bit.

 

So, out of curiosity, how would this affect a 600XL with (specifically) a 1064 memory expansion unit attached? Would the ANTIC chip have to be swapped out for an 800XL part number, or does the 1064 do something (bank-switching?) that precludes the need to do that?

 

And, as a separate question, how would this impact non-1064 memory expansions?

[Rybags]

"Old" Antic has an 8-bit refresh counter and the newer one 9-bit.

 

So, 64K memory expansions don't matter.

 

What I do have trouble deducing though is how the 130XE directs the refresh to the main or extended bank depending on the high bit (maybe the EMMU handles this?)

[+Nezgar]

I tried to figure this out previously in a similar topic:

 

http://atariage.com/forums/topic/282465-800xl1200xl-ram-question/?p=4103027

 

In summary:

 

Check your ANTIC chip part #'s:

 

• C012296 (older) has a 7 bit refresh counter and works only with DRAM with 128 cycle refresh. (2ms)
• C021697 (newer) has an 8 bit refresh counter and works with DRAM with both 128 & 256 cycle refresh. (4ms)

If the 1064 uses 7 bit DRAM, it will be fine with either ANTIC. The 1064 does no bank switching.. It simply disables all internal RAM and replaces it with the external RAM. So, when used on an 800XL (which would need a mod to add power to the PBI port) it will give no net difference, still 64K, but it's the external 64K instead of external. Maybe if the internal RAM was bad, it could be one testing option... but you'd have to open the machine to mod the PBI port for power anyway, so you might as well just replace the RAM at that point.

[Rybags]

1064 uses 4164s which are 64k x 4 bit and would require 8 bit refresh cycles.

 

Remember - 7 bits gives 14 bits of addressing which = 16K.

[+Nezgar]

1064 uses 4164s which are 64k x 4 bit and would require 8 bit refresh cycles.

 

Remember - 7 bits gives 14 bits of addressing which = 16K.

uh.. aren't 4164's 64K x 1 bit, and 4464's 64K x 4 bit?

 

The 1064 may very well use 8 4164's, but a stock 16K 600XL will have 2x4416's (2x4464's for 64K). All of which appear to have 7 or 8 bit refresh variants.

[Rybags]

Yes, 4 bit. My mistake. But the addressing is the same, ie 8 bits.

 

I didn't know of the variants of Ram requiring different refresh - makes sense though given that systems of the time were probably configured for the lesser amount.

 

Funny thing too about the 1064 from the schematic - it's relying on a chain of LS04 propogation delays to serve the function of a delay line.

[phaeron]

"Old" Antic has an 8-bit refresh counter and the newer one 9-bit.

 

So, 64K memory expansions don't matter.

 

What I do have trouble deducing though is how the 130XE directs the refresh to the main or extended bank depending on the high bit (maybe the EMMU handles this?)

 

From the schematic, I was under the impression that for any memory access both banks receive /RAS and only the selected bank for a non-refresh cycle receives /CAS. Thus, both banks would be refreshed simultaneously.