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Assembly on the 99/4A


matthew180

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11 minutes ago, mizapf said:

Are you aware that your workspace buffer is only 20 bytes long, and not >20 bytes?

That was the problem!!!

I did not even realize the typo! Changing the workspace buffer to 32 fixed the issue. As it happened, the buffer space allocation was just before the PABP definition, and since it was short 12 bytes, some of the workspace registers were overwriting the PABP definition.

Michael, you are the man!

 

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I noticed it when I set some watchpoints in the MAME debugger, and wondered why it stopped when there was no obvious access to the memory location. Could only be a register content change. You are somewhat lucky that the PABP+2 was equal to the R11 memory location, so it changed with every BL operation. Imagine this would have been another more rarely used register: You would have either never noticed it, or it would have struck in extremely weird situations (I sometimes call these "moon phase bugs", because they only appear at full moon, or half, or so).

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1 hour ago, Vorticon said:

>A840 is  the location of bytes 2 and 3 of the PAB for the CAPTURE_P file, and this is exactly where the problem is occurring. Something is changing that location somewhere in the program before the PAB is transferred to the VDP.... I need to see what it is.

Classic99 can break when an address is written to by adding > before the breakpoint address. In this case you could have written >A840 as your breakpoint and you would have discovered why it was overwritten.

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53 minutes ago, Asmusr said:

Classic99 can break when an address is written to by adding > before the breakpoint address. In this case you could have written >A840 as your breakpoint and you would have discovered why it was overwritten.

I really need to use that more often. Thanks for the tip.

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  • 4 weeks later...

Back to instruction timing...

 

I want to calculate the time to execute 

       B    *R11

when the instruction and register are on the 16-bit bus (scratchpad RAM) but the address in R11 is on the 8-bit bus. I would think that only the memory access ( M ) for source address modification would need wait states of W=4 considered. To manage this with the equation for total instruction-execution time from the TMS 9900 Microprocessor Data Manual, p. 28,

 

T = 1/3 µs (C + WM),

 

will (I think) require splitting the WM term to account for the different wait states, i.e., 0 for the instruction and register, and 4 for the source address modification:

 

T = 1/3 µs (8 + 4 + 0(2) + 4(1)) = 16/3 µs ≈ 5.333 µs

 

Can someone verify or disabuse me of this? Disabused!—see next two posts. The address is read on the 16-bit bus. The instruction at that address will be the first need for wait states, making the above equation

 

T = 1/3 µs (8 + 4 + 0(2) + 0(1)) = 12/3 µs = 4.0 µs

 

...lee

Edited by Lee Stewart
CORRECTION
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1 hour ago, apersson850 said:

There are no wait states in this case, as everything is in fast memory or inside the CPU.

Reading the next instruction is slower, since that one is in slower memory.

 

Yes—that makes sense. My misunderstanding had to do with the fact that the address retrieved is on the 8-bit bus, but, of course, reading it is still on the 16-bit bus. Setting the PC to that address just sets up the next instruction, which, as you point out, is when the wait states will happen. Thanks.

 

...lee

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More instruction timing...

 

According to the TMS 9900 Microprocessor Data Manual, p. 28, jump instructions take 10 clock cycles if the PC is changed, but only 8 if the PC is not changed. The NOP pseudo-instruction is equivalent to

       JMP  $+2

which assembles a jump offset of 0. I know this means that the PC is effectively unchanged, but, for the clock cycles involved, does this count as not changing the PC? Or, does JMP always change the PC even though the PC, in this instance, is not actually advanced, i.e., it is incremented by 0?

 

...lee

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1 hour ago, Lee Stewart said:

More instruction timing...

 

According to the TMS 9900 Microprocessor Data Manual, p. 28, jump instructions take 10 clock cycles if the PC is changed, but only 8 if the PC is not changed. The NOP pseudo-instruction is equivalent to

       JMP  $+2

which assembles a jump offset of 0. I know this means that the PC is effectively unchanged, but, for the clock cycles involved, does this count as not changing the PC? Or, does JMP always change the PC even though the PC, in this instance, is not actually advanced, i.e., it is incremented by 0?

 

...lee

Always changes the PC, that's why JMP is always 10 cycles. :)

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Instruction timing of instructions on the 8-bit bus with registers on the 16-bit bus...

 

The TMS 9900 Microprocessor Data Manual, p. 28, lists shift instructions, with shift count c ≠ 0, as taking 12+2c clock cycles and 3 memory accesses. With the following shift instruction on the 8-bit bus, but the referenced register on the 16-bit bus, I figure that only the instruction-fetch memory access is on the 8-bit bus, requiring 4 wait states, and that the other two deal with the register on the 16-bit bus, requiring, thus, no wait states:

       SRC  R2,4

T = 1/3 µs (12 + 2(4) +  4(1) + 0(2)) = 24/3 µs = 8 µs

 

Do I have that correct?  Apparently, I do! 🌞

 

...lee

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According to a listing created by xas99.py, which can infer the number of cycles based on the last set LWPI instruction, the "SRC R0,4" will take 24 cycles with WP at fast RAM (16-bit bus), otherwise 32 cycles with WP at expansion RAM (8-bit bus).

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1 hour ago, HOME AUTOMATION said:

I've been at this for 22 min.
Finally figured this out:

So, "WRP", should be "WRO", and "WRO", should be "WR0".

N=Bits 12-15.
W=Wait states(0).

I got:

  T=tcϑ=20+3+0=23/3=7.6666667MS.

I'm Irish, So, how did we get the 3MS?

 

You are, of course, correct in your analysis of the variable names, but none of that matters unless the shift count is 0, which it is not in my example. For my example, only the first line is relevant:

 

T = tc(φ)(C + WM), where

tc(φ) = clock cycle time =  µs

C = clock cycles

W = wait states/memory access, where W8bit = 4 and W16bit = 0

M = memory accesses


C = 12 + 2c, where c = shift count = 4, in this case

MM16bitM8bit, where M16bit = 2 and M8bit = 1, in this case

 

T(CW16bitM16bitW8bitM8bit)

T(12 + 2(4) + 0(2) + 4(1)) = (12 + 8 + 0 + 4) = 24/3

Tµs

 

...lee

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1 hour ago, Lee Stewart said:

...none of that matters unless the shift count is 0, which it is not in my example. For my example, only the first line is relevant:

image.thumb.jpeg.f76e1ab33a50c64e2bc6c9a822ae9384.jpeg

The Table's entry is somewhat mysterious. ...Maybe mine is different.

 

------------------------------------------------------------------------------------------------------

 

Oops... I meant:

2 hours ago, HOME AUTOMATION said:

So, how did we get the .333MS?

 

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1 hour ago, HOME AUTOMATION said:

The Table's entry is somewhat mysterious. ...Maybe mine is different.

 

The confusion, I think, is that TI used ‘C’ to represent two different variables, clock cycles and count. I distinguish them in my posts by using ‘C’ for clock cycles and ‘c’ for count.

 

...lee

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T = ⅓(12 + 2(4) + 0(2) + 4(1)) = ⅓(12 + 8 + 0 + 4) = 24/3
T = ⅓(12 + 2(4) + 0(2) x 3(1)) = ⅓(12 + 8 + 0 x 3) = 60/3 = 20MS
     (    C   ) + (W ) x ( M )        C     W   M

 

Changing my answer. I was following your work before, and didn't catch the operational error, adding Vs. multiplying.

 

-----------------------------------------------------------------------------------------------------------------------------------  

EDIT:

Changing my answer, yet again.:roll: I was following your work before, and didn't catch the operational error, adding Vs. multiplying.

Nor was I following procedure. Multiply first, then add.:dunce:

T = ⅓(12 + 2(4) + 0(2) x 3(1)) = ⅓(12 + 8 + 0 x 3) = 20/3 = 6.66MS
     (    C   ) + (W ) x ( M )        C     W   M

...and like in the book...

T = tc(Φ) (C + W·M) = 0.333 (20 + 0-3) us = 6.666667 us.


T = tc(Φ) (C + W·M)
    C=20+0=20
    M=3+0=3
T = 0.333 (20+0·3) us = 6.666 us.

 

  P.S. Sorry about the Theta symbol before.:twisted:

     -HA  

Edited by HOME AUTOMATION
multiple corrections...........
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It seems you added to the confusion now instead, by mixing up operations and units.

The answer should be 6.66 us in both the upper and lower section. In the lower section, you write 0.333 (20+0-3) where you mean 0.333(20+0*3). And finally it's ms, not MS for milliseconds. MS represents megasiemens.

7 hours ago, HOME AUTOMATION said:
T = ⅓(12 + 2(4) + 0(2) x 3(1)) = ⅓(12 + 8 + 0 x 3) = 20/3 = 6.66MS
     (    C   ) + (W ) x ( M )        C     W   M

...and like in the book...

T = tc(Φ) (C + W·M) = 0.333 (20 + 0-3) us = 6.666667 us.


T = tc(Φ) (C + W·M)
    C=20+0=20
    M=3+0=3
T = 0.333 (20+0·3) us = 6.666 us.
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Yeah, I O.C.R.ed, it from the book, tried to fill-in...

...must have fat fingered that minus sign...👇

image.thumb.jpeg.bf786228ac32ae4b16c04cc137d55588.jpeg

 

But, I think that we're on MICROSECONDS. That's how they taught me to do it in school.

So, blame it on the teacher ...not me...

...HEY! ...TEACHER! ...Leave those kids ALONE!:music:

image.thumb.jpeg.5e9cbaf5ca39ad7edb0624353a926567.jpeg

...Least I finally got the solution right. 🏁

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