Assembly on the 99/4A

[Gary from OPA]

1 hour ago, apersson850 said:

Sure you can understand the system, but the lack of documentation is the pure definition of a lousy and incompetent programmer. So obviously he was that.

Well that's your narrow view and opinion, but if you had work along side him like I did and see how he operate and was able to complete tasks that were needed, you would have different opinion.

[Tursi]

9 hours ago, Gary from OPA said:

Well that's your narrow view and opinion, but if you had work along side him like I did and see how he operate and was able to complete tasks that were needed, you would have different opinion.

How did the next person who had to maintain that system feel about him?

Comments are a social contract. Refusing to write them is sociopathic.

 

He was a great guy and an excellent programmer, but self-skill doesn't justify screwing the next guy.

 

[RXB]

I met a Programmer that did not comment anything in his code but he had a good reason...

 

photographic memory.

[Gary from OPA]

4 minutes ago, RXB said:

I met a Programmer that did not comment anything in his code but he had a good reason...

 

photographic memory.

Well James had good memory as well. Sadly, so do I. But the issue the others in this thread have its that it makes it harder for others to pick up the work once the person leaves. which i can understand, but that can also be solved with having very good docs on how to use the program, for example if its api and how to interface to it.

[apersson850]

Documentation on how to use it must of course exist too. But that doesn't fully help the person who will take the responsibility to maintain and further develop this code on Wednesday, because the original creator was run over by a bus on Tuesday.

As a professional programmer you must assume that any day your work may have to be completed/maintained by somebody else, since you may not come back tomorrow, even if that was your plan.

 

I've created code professionally for more than 35 years now and I can say for sure that there's no talent that can excuse sloppiness of this kind. We have systems that sometimes lives for more than 20 years and such code simply must be possible to understand even when I retire in a few years from now.

[Artoj]

Hi All,

Back in the day I wrote code everyday and loved it, it was such a joy. Luckily I have found a lot of old printouts, still quite damaged through water and just fading away. Here is a routine I wrote to open and close small windows on the screen, I remember it was part of a suite that was going to be call TIGOS (Texas Instruments Graphic Operating System), I have some parts I am still deciphering, as they were many alteration by pencil on water damaged and faded dot-matrix printouts. I've typed it in and hopefully there are no errors, I hope you enjoy, regards Arto. 

 

**********************************
CALL LINK("WOPEN",VAR,X1,X2,Y1,Y2)
----------------------------------

VAR	=0 TO 9		TOTAL OF 10 WINDOWS
X1	=1 TO 32	START COLUMN
X2	=1 TO 32	END COLUMN
Y1	=1 TO 24	START ROW
Y2	=1 TO 24	END ROW

ONLY MINIMAL ERROR CHECKING
THE LOCATION DECIMAL 32248 HOLDS (>7DF8)
THE CHARACTER FOR THE WINDOWS BACKPROP

----------------------------------
CALL LINK("WCLOSE",VAR)

VAR	=0 TO 9		TOTAL OF 10 WINDOWS

ONLY CLOSE A WINDOW IF IT HAS 
BEEN PREVIUOSLY BEEN OPENED

----------------------------------

MINIMAL REQUIREMENTS MINI-MEM + 32K

		BY ARTO 1986
		
-------------------------------------------------

7D00	02E0		LWPI >70B8			WORKSPACE
7D02	70B8
7D04	C808		MOV R11,@>7DF4		SAVE RETURN [RT]
7D06	7DF4
7D08	04C0		CLR R0				NO ARRAY
7D0A	04C1		CLR R1
7D0C	06A0		BL @>7DB6			GET 1ST ARGUMENT [FC]
7D0E	7DB6		
7D10	C120		MOV @>834A,R4
7D12	834A	
7D14	06A0		BL @>7DB6			2ND [FC]
7D16	7DB6
7D18	C160		MOV @>834A,R5
7D1A	834A	
7D1C	06A0		BL @>7DB6			3RD [FC]
7D1E	7DB6
7D20	C1A0		MOV @>834A,R6
7D22	834A		
7D24	06A0		BL @>7DB6			4TH [FC]
7D26	7DB6
7D28	C1E0		MOV @>834A,R7
7D2A	834A
7D2C	06A0		BL @>7DB6			5TH [FC]
7D2E	7DB6
7D30	C220		MOV @>834A,R8	
7D32	834A
7D34	C244		MOV R4,R9			R9 = LOCATION STORE
7D36	0A39		SLA R9,3			     FOR VALUE IN	
7D38	0229		AI R9,>7DFA				 ARGUEMENT [SR]
7D3A	7DFA
7D3C	0288		CI R8.>18			CHECK Y2 24	
7D3E	0018
7D40	1535		JGT >7DAC			[EX]
7D42	0286		CI R6,>20			CHECH X2 32
7D44	0020
7D46	1532		JGT >7DAC			[EX]
7D48	0607		DEC R7				ADJUST Y VALUE 
7D4A	0A57		SLA R7,5			       FOR SCREEN
7D4C	0608		DEC R8
7D4E	0A58		SLA R8,5
7D50	CE45		MOV R5,*R9+			STORE X1
7D52	CE46		MOV R6,*R9+			      X2
7D54	CE47		MOV R7,*R9+			      Y1		
7D56	CE48		MOV R8,*R9+			      Y2
7D58	1000		NOP
7D5A	1000		NOP
7D5C	0209		LI R9,>1111			LOAD FOR COMPARE
7D62	7DF0
7D64	0202	RG	LI R2,>0001			R2 = AMOUNT
7D68	C244		MOV R4,R9			CHANGE VARIABLE
7D6A	3A60		MPY @>7DF6,R9		    TO MEMORY LOCATION [NM]
7D6C	7DF6		
7D6E	C10A		MOV R10,R4
7D70	0224		AI R4,>2000
7D72	2000
7D74	0248		MOV R8,R9			FINISH ROW
7D76	A246		A R6,R9				FINISH SCREEN
7D78	C285	NX	MOV R5,R10			COLUMN START
7D7A	C007		MOV R7,R0			ROW START
7D7C	A005		A R5,R0				SCREEN LOCATION
7D7E	C0C0	NT	MOV R0,R3			SCREEN LOCATION TO
7D80	A0C4		A R4,R3				       MEMORY LOCATION
7D82	C043		MOV R3,R1			
7D84	8820		C @>7DF2,@7DF0		COMPARE OPEN OR CLOSE
7D86	7DF2							[CP CO]
7D88	7DF0
7D8A	1304		JEQ >7D94			JMP CLOSE [CC]
7D8C	0420		BLWP @>6030			READ SCREEN
7D8E	6030
7D90	0201		LI R1,>7DF8			CHARACTER FOR WINDOW [SP]
7D92	7DF8
7D94	0420	CC	BLWP @>6028			WRITE SCREEN
7D96	6028
7D98	0580		INC R0				INCREMENT POSITION
7D9A	058A		INC R10				INCREMENT COLUMN
7D9C	0240		C R0,R9				ALL DONE
7D9E	1306		JEQ >7DAC			[EX]
7DA0	1505		JGT >7DAC			[EX]
7DA2	818A		C R10,R6			COLUMN <R COL
7DA4	11EC		JLT >7D7E			NEXT COLUMN [NT]
7DA6	0227		AI R7,32			ADD 32 TO START ROW
7DA8	0020
7DAA	10E6		JMP >7D78			NEXT ROW [NX]
7DAC	04E0	EX	CLR @>837C			NO ERROR
7DAE	837C
7DB0	02E0		MOV @>7DF4,R11		R11 = RETURN
7DB2	7DF4
7DB4	045B		B *R11				RETURN TO BASIC
7DB6	0581	FC	INC R1				NEXT ARGUEMENT
7DB8	0420		BLWP @>6044			GET NUMBER
7DBA	6044
7DBC	0420		BLWP @>601C			FLOATING POINT TO
7DBE	601C							         INTEGER
7DC0	1200		DATA >1200
7DC2	045B		B *R11				RETURN SUBROUTINE
7DC4	02E0	CL	LWPI >70B8			CLOSE SUBROUTINE
7DC6	70B8
7DC8	C80B		MOV R11,@>7DF4		SAVE RETURN [RT]
7DCA	7DF4
7DCC	04C0		CLR R0				NUMBER ARRAY
7DCE	04C1		CLR R1
7DD0	06A0		BL @>7DB6			GET WINDOW NUMBER
7DD2	7D86								USED [FC]
7DD4	C120		MOV @>834A,R4
7DD6	834A
7DD8	C244		MOV R4,R9			CHANGE VARIABLE TO
7DDA	0A39		SLA R9,3			       TO STORE
7DDC	0229		AI R9, >7DFA		       LOCATION [SR]
7DDE	7DFA
7DE0	C179		MOV *R9+,R5			GET X1
7DE2	C189		MOV *R9+,R6			GET X2
7DE4	C1F9		MOV *R9+,R7			GET Y1
7DE6	C239		MOV *R9+,R8			GET Y2
7DE8	C820		MOV @>7DF2,@>7DF0	LOAD FOR COMPARE [CP CO]
7DEA	7DF2
7DEC	7DF0
7DEE	10BA		JMP >7D64			JUMP TO REGISTER [RG]
7DF0	0000	CO	DATA >0000			COMPARE DATA
7DF2	2222	CP	DATA >2222			
7DF4	0000	RT	DATA >0000			RETURN
7DF6	0300	NM	DATA >0300			SCREEN
7DF8	8080	SP	DATA >8080			WINDOW CHARACTER
7DFA	0000	SR	BSS 32				STORE VALUES
7E1A	0000		AORG >701E
701E	7FE0		DATA >7FE0
7020	0000		AORG >7FE0
7FE0	574F		TEXT 'WOPEN'
7FE2	5045
7FE4	4E20
7FE6	7D00		DATA >7D00
7FE8	5743		TEXT 'WCLOSE'
7FEA	4C4F
7FEC	5345
7FEE	7DC4		DATA >7DC4
7FE0	4F4C		END

 

[+dhe]

@Vorticon it's been a month or so ago now, but did you ever get your AMS code working in Assembly under the P-System?

[+Vorticon]

36 minutes ago, dhe said:

@Vorticon it's been a month or so ago now, but did you ever get your AMS code working in Assembly under the P-System?

I sure did! I created a library of functions to initialize the SAMS and store/retrieve data. 

[+TheBF]

@Vorticon is pushing the envelope of the P-System for use in the 21 century.  

Really cool stuff he has created so far. 

[DPOLARA]

I've been spoiled, writing and debugging TI-99/4A Assembler Code in Classic99, but I'm having problems getting the Editor/Assembler Debugger to properly work on actual TI-99/4A.  After setting breakpoints, I think the system is supposed to return to the DEBUGGER, but it just stops running and appears frozen.  I need to power cycle the TI-99/4A when it hits a breakpoint.  Does anyone have any tips, tricks, links or tutorials for running the EA Debugger on actual TI-99/4A hardware?  Thank you!

[DPOLARA]

Has anyone checked out or purchased this new book that includes Intro to TMS9900 Assembly Language https://www.chibiakumas.com/tms9900/?  I think I'm going to buy a copy just to support this author's ambitious efforts.

 

[apersson850]

Perhaps we should support him by teaching instead? I had a look at that page and found an error pretty quickly.

[+InsaneMultitasker]

I could only look at that web site for 30 seconds before the Lite-Brite / dark color scheme gave me a headache.  The site has some good info and a different way of portraying/explaining the instructions, but also some errors as apersson850 points out.

 

Edit: didn't this site come up once before as a discussion point? Is the author part of the AA community?

[+Vorticon]

I needed a BCD to HEX converter for accessing the RTC on the IDE card and I came up with this routine. R4 has the BCD value. Is there a more efficient way of doing this?

bcd2hex mov     r4,r5           ;isolate low digit
        andi    r5,000fh
        mov     r4,r6           ;isolate high digit
        andi    r6,00f0h
        srl     r6,4
        mov     r6,r4           ;save original value
        sla     r6,3            ;multiply by 8
        sla     r4,1            ;multiply original value by 2
        a       r4,r6           ;high value has now been multiplied by 10
        a       r5,r6           ;add low and high numbers. r6 now has hex value
        b       *r11

 

[hhos]

The "ANDI  R4,00f0h" is superfluous for the algorithm you are using, but I think if you leave that in you can speed this up significantly.  I've capitalized the portions of code that make a difference and counted the clocks required below.

 

bcd2hex mov     r4,r5           ;isolate low digit
        andi    r5,000fh
.....

        CLR     R6        ;1,~10  Prep accumulator reg
        ANDI    R4,>00F0    ;2,~14  necessary for this algorithm
        SRL     R4,1        ;1,~14  shift right 1 bit for 8x val
        A       R4,R6        ;1,~14  add 8x val to acc. reg
        SRL     R4,2        ;1,~16  shift right 2 bits for 2x val
*             Totals: 6 words,68 clocks

 

             vs.        
        
        MOV     R4,R6           ;1,~14
*       ANDI    R4,>00F0    ;2,~14 considered superfluous for this algorithm, so commented out and not counted
        SRL     R6,4        ;1,~20
        MOV     R6,R4           ;1,~14
        SLA     R6,3            ;1,~18
        SLA     R4,1            ;1,~14
*             Totals: 5 words,80 clocks
''''
       
        a       r4,r6        ;add 2x val to acc. reg
        a       r5,r6         ;add LS nibble to acc. reg
        b       *r11        ;return result in R6

 

This eliminates one shift instruction (12 clocks), 5 shifts (2x5=10 clocks), and adds one CLR (10 clocks) for a 12 clock cycle improvement in speed when excluding the ANDI instruction.  It is 26 clocks faster than your original.    I have not tested this, but I think it should work fine without changing any of your calling routines.

 

HH

Edited July 17 by hhos
Added colors to highlight competing code segments

[+Vorticon]

I'm not sure I understand your use of SRL here.

[hhos]

1 hour ago, Vorticon said:

I'm not sure I understand your use of SRL here.

I eliminated the initial CLR instruction in this iteration of code.  It was also superfluous.   That shaves another 10 clock cycles from our time, and reduces the memory footprint by one word, too.  I added some colors to the previous post to make it clearer, hopefully.  Now the explanation.

 

        CLR     R6        ;1,~10  Prep accumulator reg.   Eliminating this line from previous code

Coming into this code fragment, R4 contains its original packed BCD contents.     

        ANDI    R4,>00F0    ;2,~14  necessary for this algorithm

Now it has the 4 LSbits cleared giving a value in R4 of 16x the desired magnitude for our times 10 calculation. So we ....
        SRL     R4,1        ;1,~14  shift right 1 bit for 8x val

...divide by 2.  R4 is now 8x val of the upper nibble, which is one of the numbers we need for our 10x calc, hence ...
        MOV    R4,R6        ;1,~14  move 8x val to acc. reg

.... we initialize our accumulator register, R6, to 8x the value of the MSnibble.
        SRL     R4,2        ;1,~16  shift right 2 bits for 2x val

*             Totals: 5 words,58 clocks

 

Divide the 8x value by 4 with a 2 bit right shift, resulting in a 2x the value of the MSnibble.  Then finish up with the final 3 instructions in your code.

 

        a       r4,r6        ;add 2x val to acc. reg
        a       r5,r6         ;add LS nibble to acc. reg
        b       *r11        ;return result in R6

I hope this clears it all up.

HH

 

Edited July 17 by hhos

[+Vorticon]

It does! Would never have thought of doing it that way... Very neat!

I have to admit though that in my limited experience efficient code tends to be less easily understood than inefficient one and I suppose the approach taken will depend on how much efficiency one needs. 

[Stuart]

On 7/15/2024 at 10:46 PM, Vorticon said:

I needed a BCD to HEX converter for accessing the RTC on the IDE card and I came up with this routine. R4 has the BCD value. Is there a more efficient way of doing this?

 

If speed was of the essence (it probably isn't!) and you have the memory available, don't forget a good ol' lookup table.

[hhos]

On 7/17/2024 at 12:38 PM, Vorticon said:

... I suppose the approach taken will depend on how much efficiency one needs. 

Yes, I wrote a program for i8086 about 4 decades ago where I was continually storing and loading the DX register.  I was pretty certain I didn't need to do that (about 99.999%) but I never did change it.  It was already blazingly fast, and had a small enough memory footprint, so why bother?

[+Vorticon]

Any way to see some general example code on how to set up an ISR? The RTC on the IDE card can generate interrupts but I don't know how to service them. I understand interrupt vectors and such but have never seen actual code on this.

[hhos]

On 7/23/2024 at 11:53 PM, Vorticon said:

Any way to see some general example code on how to set up an ISR? The RTC on the IDE card can generate interrupts but I don't know how to service them. I understand interrupt vectors and such but have never seen actual code on this.

Matthew180 submitted a post on the subject on page 35 of this thread that might be of some help to you.

 

HH

[+Lee Stewart]

On 7/24/2024 at 1:53 AM, Vorticon said:

Any way to see some general example code on how to set up an ISR? The RTC on the IDE card can generate interrupts but I don't know how to service them. I understand interrupt vectors and such but have never seen actual code on this.

 

The console ISR is at 0900h – >0ABEh. The TI-commented code I always consult is here. Here is the end of the console ISR code (where your ISR is called) with my comments:

 

TIMIN1 LWPI WKSE             change to GPL workspace
       AB   R14,@TIME        INC VDP interrupt timer (>8379)
       MOV  @WKSC+R2+R2,R12  ISR hook (>83C4) to R12
       JEQ  SNDEXT           skip if no user ISR
       BL   *R12             branch to user's ISR
SNDEXT CLR  R8               clear GPL R8 for BASIC
       LWPI WKSC             back to ISR workspace (>83C0)
       RTWP                  Return to caller

 

Your ISR’s entry point address (MYISR in the template below) should be stashed in 83C4h, probably before interrupts are allowed. Your ISR routine should be set up as follows:

 

* DO NOT enable interrupts in MYISR!!
MYWS   BSS 32             reserve space for my workspace
MYISR  LWPI MYWS          change to my workspace
* <my ISR code>
*     ...
* </my ISR code>
       LWPI >83E0         restore GPL workspace
       RT                 return to console ISR

 

...lee

[apersson850]

That's a completely different thing. That's a piece of code that's executed when the console has received the VDP interrupt.

@Vorticon is referring to how to structure a DSR that's residing on a card in the expansion box, a card that can generate an interrupt.

I have written one for my own clock card, but I've had a damaged disk and can't find a copy of it. I do think I have the object code, so I could perhaps load that and then disassemble it...

[hhos]

On 7/30/2024 at 2:05 AM, apersson850 said:

That's a completely different thing. That's a piece of code that's executed when the console has received the VDP interrupt.

apersson850, where else would it go? The one interrupt TI gave us was interrupt 1. That means the CPU will check the interrupt selection inputs on pins 33-36, come up with the hardware wired-in-vector address of 0001, and load the addresses in >0004-5, >0006-7 to WS and PC. Reset and Load would give a different result, but unless the console has been "FIXED", no other result can be expected. You should have a look at the code that Lee presented, not just the examples he put up, but the reference file he offered.

 

The solution Lee Stewart offers will allow the programmer a single user defined ISR, or a rather shaky chain of ISRs.  It's not the best answer in this case, if I understand the situation correctly.

 

On 7/23/2024 at 11:53 PM, Vorticon said:

Any way to see some general example code on how to set up an ISR? The RTC on the IDE card can generate interrupts but I don't know how to service them. I understand interrupt vectors and such but have never seen actual code on this.

Vorticon, you should be able to find the code you're looking for in the SRAM of the IDE board, right? That's what it sounded like to me anyway, when I skimmed through these:

 

https://www.unige.ch/medecine/nouspikel/ti99/headers.htm

http://unige.ch/medecine/nouspikel/ti99/ide.htm

http://unige.ch/medecine/nouspikel/ti99/ide2.htm

 

There should be a disk image file for the RTC chip on your board. On that image there will presumably be a binary file that can be disassembled to give you a look at the ISR(s) and the startup routine(s). If the existing ISR and subroutine files don't offer what you need, the file can be changed and substituted for the default file then.

 

HH