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Possibly Complicated N64 SYNC Question.


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So I am trying to make a definitive way of dealing with the N64's lack of csync on certain NS1 revisions.

What I think I know so far:


My NUS encoder is putting out 3.36v

I want to buffer the sync through a THS7374 which has a 300mv level shift (on top of the 6db [2x] gain.

CS75 should be -286.00mV (I think)


I should be shooting for 600mv coming out of the 7374 which will be divided by resistors to 300mv

That means I need the input sync to be 150mv (300mv/2=150mv[level shift])150mv(sync)+150mv(shift)=300x2(6db gain)=600mv


That would mean I'd need a voltage divider at the input. Right now I have 1.6k in series with 75ohm to ground

Not sure how correct any of this stuff is. Every time I think I know whats up I miss something so let me know pls ;)


I also wonder if you could feed the TTL sync from the NUS chip directly into the sync for your TV.




Edited by the_crayon_king
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So I found a N64 laying around that was already RGB modified but lacking the C-sync components described below.

Anyway passing un-buffered C-sync direct from the NUS chip worked fine; dunno why I have never heard of anyone doing it before.


It looks like the missing components should buffer 3.3v C-sync down to 2.3V.

IDK if its right but refer to:





TTL sync's high level needs to be 2v-5v; 2.3v is a narrow margin. I wonder if that is why N64's native C-sync is known to be wonky.

I would guess that there is 75ohms to ground on the sync end of the scart cable but without series resistor there is no voltage lost.


I think that issues may arise over longer cables or perhaps there may be some impedance issues but it looked fine on my TV.

For reference I am using retro_console_accessories C# scart cable.


This stuff is all for a new N64 RGB board revision I have been working on:


As with all my boards feel free to print and use for personal use, mod services, whatever; just not resale,

Print at 0.6-0.8

Ill have to make another revision for hand soldering this specific board is for machine assembly but should be possible by hand.

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I built the above circuit and got about a 150mv shift as the sync pulse (which is not what I expected but it did work on my setup).

Sync direct out of the NUS encoder looks like a 3v p-p shift and all the references I can find say sync should be a -0.3v shift.


The top on this next picture is the Typical TTL to Non TTL solution but it isn't the same as CS#75 which is what I am shooting for.

I am trying to find more info on sync and what it needs to be but this is a good enough approximation for now.

I did notice a bunch of extra noise on the Csync waveform after buffering with the THS7374 I suspect it might be line noise that is much more aparent looking at the buffered (smaller) signal vs the TTL (unbuffered/larger) signal.



The 75 ohm resistor on the topmost would be the termination resistor for the TTL>NON-TTL

The 75 on the bottom-right would also be a termination resistor. The other 75ohm on the bottom left is just for dividing.


So this should be a better solution http://tinyurl.com/h7pa4ow:


Edited by the_crayon_king
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