Jump to content
IGNORED

TAL by any other name is ...?


helocast
 Share

Recommended Posts

I'm sure this "wanted project" falls into a small subset of users aka 1%-ers, but has anyone come up with a full set of equations to describe the "glue chip" of the TI-99/QI motherboards?

Of all the "still existing" de-solder-and-pop-in-a-socket drop-in chips, the CD40050 isn't one of them. A very 1975 era FPLA (actually more of a fused, simple AND-OR array) barely predates this and the GAL didn't arrive on the scene until Lattice in 1984!

I've been beating myself up with only partial success. I don't know VHDL and I'm not sure the complexity of the project requires something on the order of a CPLD/FPGA anyway ... perhaps a 22v10++ ;-]

 

What seems most likely to me is that TI just carved out a large piece of silicon and deposited all the inverters, NANDs, ORS, NORs, and discrete flip-flops/latches of the 4A schematic on it in groups with interconnects and called it a day. It's even hard working backwards from 4A schematics when some of the QI signals of the glue chip don't share the same name between 4A and QI schematics.

 

I envision, but am I wasting my time in a PLA, CD40050 pin-compatible, small board design with additional solder pads (access points) of key logic results so that all the console upgrades like those at Mainbyte/Thierry/et al can be applied to these consoles as well?

Thanks for any input!

post-48993-0-68117000-1490728233_thumb.jpg

Link to comment
Share on other sites

Look at the HOMBRE chip description on WHT. It may be filed under the 99/8 logic diagrams, but it was intended for the LPC version of the /4A. The schematic for it is a gate-level schematic, so that should help you a lot.

Edited by Ksarul
  • Like 1
Link to comment
Share on other sites

Look at the HOMBRE chip description on WHT. It may be filed under the 99/8 logic diagrams, but it was intended for the LPC version of the /4A. The schematic for it is a gate-level schematic, so that should help you a lot.

 

Thank you! I certainly recognize most of those signals. Took me a while to locate http://ftp.whtech.com/datasheets%20and%20manuals/99-8%20Computer/TI%2099_8%20Hombre%20Logic%20Diagrams.pdf

Onward and upward.

Link to comment
Share on other sites

Giving back for those who can use the information. 1/2 solution done (combinatorial logic) and I'm currently working sequential logic which is kicking my you know what. ;)

 

Attachments:

- Redrawn schematic as 256-color bitmap, full size (any lower resolution makes it barely readable like original provided above)

- Minterms in .txt format, both Product of Sums and Sum of Products

- Truth table of inputs/outputs, in comma-separated-value format (zipped because upload doesn't like raw .csv files?)

- All work in full analyzer program data file, also zipped, which can be immediately used in the following program

 

Program used to capture minterms/schematic is Logic Friday 1 http://sontrak.com/downloads.html (sorry, but can't afford CPLD/FPGA design software, but it's where I'm headed)

CD40050 (seq logic only).bmp

CD40050 terms.txt

CD40050 (min truth table).zip

CD40050.zip

Edited by helocast
  • Like 1
Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

Loading...
 Share

  • Recently Browsing   0 members

    • No registered users viewing this page.
×
×
  • Create New...