What is Reset Vector?

[Just Jeff]

Good Morning,

 

After all this time, I still have a pretty sad understanding of reset vector. I put it in my programs, I read that it is an address that will trigger an initialization of the processor, but I really don't know specifically what's going on here or why.

 

So in my own words, if the program counter goes there, your program is done and its like you turned the machine off then on again. Does that sound about right?

 

If so, I'm still wondering why it is put into the ASM. Seems like it would be a hard-wired address that you can't change or that when you tell DASM "PROCESSOR 6502", the reset would already be known. Can I pick another address? Also, I don't recall ever seeing an instruction pointing to the reset address so it doesn't seem useful.

[+SpiceWare]

The Reset Vector is the hard-wired address that you can't change, it's always found at $FFFC and FFFD on the 6502 processors. When the processor is powered up the first thing it does is JMP (RESET_VECTOR). You can even issue that jump command yourself to reset your game.

 

Another way to look at it is the Reset Vector is a pointer(reply #20) that points to the start of your program.

 

http://wilsonminesco.com/6502primer/MemMapReqs.html

 

http://www.pagetable.com/?p=410

[alex_79]

 

So in my own words, if the program counter goes there, your program is done and its like you turned the machine off then on again. Does that sound about right?

Nope.

As SpiceWare wrote, the reset vector is just a pointer to the beginning of your code (which can be anywhere in the rom).

At power on, the cpu will load the program counter with those two bytes at $FFFC and $FFFD and start execution from there (that is just another way to say that it executes the instruction JMP ($FFFC) ).

So you'd better ensure that those two bytes actually correspond to the real address your code starts from.

 

Apart from that, there's nothing special about the reset vector compared to any other memory location. It's not an "hotspot" address that triggers some circuit to reset the cpu or anything like that. If the program counter goes there, the cpu just decodes the bytes as instruction and operands and executes them, like it always does.

[+nanochess]

If we see the processor as a person, the first thing he does in the morning (RESET) is to check the address contained in FFFCH and proceed from there.

 

It's because of this it's called RESET vector.

[Just Jeff]

OK I think I'm getting it. Basically, the 6502 does a jmp.ind to the address located at $FFFC when its first turned on. I've been using this:

 

ORG $FFFA ; set address to 6507 Interrupt Vectors
.WORD InitSystem ; NMI
.WORD InitSystem ; RESET
.WORD InitSystem ; IRQ

 

and InitSystem is my CLEAN_START macro. Thanks!

 

What about the interrupts above? Do we ever use these? Is this for the BRK command? How is a mask used for an interrupt?

[alex_79]

Hardware interrupts are disabled in the 2600 (the pins are missing from the 6507, and the corresponding lines are internally tied to logic '1').
You can ignore the NMI vector at $FFFA-$FFFB (you can safely use those two bytes for something else), and you only need the IRQ vector at $FFFE-$FFFF if you want to use the BRK instruction in your code. If you don't use BRK, you can skip the IRQ vector too.

Edited May 8, 2017 by alex_79

[+nanochess]

BRK would be essentially a CALL with fixed address in one byte, sometimes has been used to save space.

[Just Jeff]

OK Cool-this isn't so hard. I guess I just ignored it because it tends to appear at the end of programs and I get distracted way before I get to it. I was hacking a program once and someone pointed out that I had let it run into the reset vector and that was causing my issue but I never pursued it any further.

 

So is the NMI non-maskable because its supposed to be a hardware interrupt? Is the fact that IRQ is maskable relevant to 2600? Seems like it might only be usable if that was RAM- not ROM. Or do you load it into the accumulator and do whatever masking you wanted to apply to it?

[DirtyHairy]

So is the NMI non-maskable because its supposed to be a hardware interrupt? Is the fact that IRQ is maskable relevant to 2600? Seems like it might only be usable if that was RAM- not ROM. Or do you load it into the accumulator and do whatever masking you wanted to apply to it?

 

As Alex said, interrupts cannot be used on the VCS as the version of the 6502 used is missing the IRQ and NMI pins (as well as the highest bits of the address bus) To answer your questions:

 

Both IRQs and NMIs are hardware interrupts.

• IRQs are triggered by pulling the IRQ pin low. As long as the pin is pulled low AND the interrupt flag is cleared, the CPU will jump to the IRQ vector during fetch instead of executing the next instruction. During IRQ dispatch, the CPU pushes the old flags on the stack and sets the interrupt flag in order to avoid the IRQ being dispatched again immediatelly. The handler has to take care of clearing the IRQ condition (causing the interrupting hardware to stop pulling IRQ low) before return via RTI. RTI restores the flags from the stack, causing the interrupt flag to be restored to its former value. If it was cleared before and the handler didn't clear the IRQ condition, the IRQ will be dispatched again immediatelly. In addition to the IRQ dispatch mechanism, the flag can also be set and cleared via STI and CLI (e.g. during time critical operations).
• NMIs are triggered by a falling edge (1 -> 0) on the NMI pin. This will cause the CPU to jump to the NMI vector on the next fetch instead of executing the next instruction, irrespectively of the state of the interrupt flag --- NMIs cannot be masked and can even interrupt an active IRQ handler. The intented purpose is to use NMIs to serve hardware events that must be handled immediatelly under all circumstances, while IRQ handling may be delayed indefinitely. Apart from the different signalling (edge vs. level) and vectors, dispatch works just like an ordinary IRQ. However, as the NMI is triggered by edge and will not be repeated (unless the hardware event repeats), no action is required to clear the condition.

However, as I said, this is purely academic as far as the VCS is concerned.

Edited May 8, 2017 by DirtyHairy

[Just Jeff]

Thanks.. I realize this was getting a little tangential, but I don't like putting code in an asm without understanding what's going on and this little bit went on way too long. Also maybe one day I'll code an actual 6502 and it will be more useful.

 

Maybe one more question. Why is it called a vector? That term doesn't come up too much- seems like its just an address. Here's the definition I found but it doesn't seem to apply;

4. (Computers) an array of data ordered such that individual items can be located with a single index or subscript.

[tschak909]

In this case, "vector" is in the traditional physics definition, as in "a direction to go" ... vectors in this case, are merely pointers... when you write a piece of firmware that you intend others to utilize in their own code, you provide a "vector table" of addresses that don't change, but what they point to might (due to code changes)...it's like the prototypical API.

 

-Thom

[+SpiceWare]

[tschak909]

one of the greatest movies ever made.

[Just Jeff]

it all makes sense now

[Just Jeff]

Still more questions after watching the video-

 

Do you know what it's like to fall in the mud and get kicked... in the head... with an iron boot? Of course you don't, no one does. It never happens. Sorry, Ted, that's a dumb question... skip that.