Accelerators - Any Clock Doubled 6502s?

[Xebec]

My understanding of Atari 8-bit accelerators is you have 'the high end' which are 65c816 chips and boards running at 14-20 MHz.. Costing something like ~ 200 USD / 170 EU such as the Rapidus.

 

There are also versions of the 65c816 that plug into the 6502 socket directly that would be running at the stock 1.77/1.79 MHz but give you a boost on certain instructions; though it's not a major boost like going from a not fully pipelined processor to fully pipelined (i.e. 386 to 486).

 

But I have not seen any low cost options such as a clock doubled 6502, which while it would be limited by the bus and RAM speed shared with ANTIC, I think would help performance since many 6502 instructions have quite a lot of latency.

 

Is such a thing possible? If you believe there would be no benefit to this approach, please explain.. I see exxos's (impressively low cost) accelerators for the ST that double the clock to 16 MHz on the 68000 and provide useful benefits in many applications and would think the 6502 being primitive and not pipelined would similarly work better at 3.54-3.58 MHz than stock..

 

 

 

[Rybags]

The cost these days isn't really in the CPU or the speed, it's just the overall component overhead which is much the same and cost to get it manufactured.

 

Little point in slower devices as the saving would be none or minimal.

The problem is even though the 6502 does have cycles where it appears to have no bus activity the reality is that it's almost constantly on the bus. The activity is fairly well documented, e.g. an INC <abs> instruction will read the source data, write it back then write back the incremented value. Similarly a LDA <abs>,X instruction will do a speculative read but if the indexing means the address is on the page after the speculative read then the proper address will be read at the cost of an extra cycle.

 

So, no spare cycles. Problem 2 is that the chipset relies on the ~ 1.8 MHz system bus and problem #3 is that in older systems the Ram was generally only capable of 2 MHz operation anyway.

 

As such, existing fast upgrades will usually have wait states when accessing the legacy "slow" Ram, Rom or IO space. The way around the slow legacy bus is to just include fast Ram on the device, then have a mechanism to allow Antic to read it (which might also generate extra waits).

[ivop]

Another way to get "more cycles" could be to replace the DRAM by Dual-Port SRAM and completely separate the ANTIC and the CPU bus, except for when the CPU read or writes to ANTIC.

This would eliminate almost all HALTs. Dual-Port SRAM is expensive though. 64Kx8K by Cypress is around 20 euro.

[Rybags]

Probably another case of little saving and little benefit vs full blown acceleration.

The problem with software breaking is that it can equally happen with a 33% speedup or a 700% one.

[Xebec]

The cost these days isn't really in the CPU or the speed, it's just the overall component overhead which is much the same and cost to get it manufactured.

 

Little point in slower devices as the saving would be none or minimal.

 

I would disagree - if Exxos can make and sell a 16 MHz 68000 upgrade for the ST for $65, which is 1/3rd the price of a Rapdius.. why can't something like that be made using a simpler 6502 at twice the speed? The 6502 has probably less than half the pins to worry about..

 

The 16 MHz ST upgrade uses the same 8 MHz bus, provides a useful speedup of 30-40%, and there's even a 32 MHz (still on the 8 MHz bus) that doubles the speed in many cases.

 

A $65 accelerator that makes SpartaDOS X, Fractalus, and the GUI a little more snappy is a lot different of a proposition than the $200+ Rapidus..

 

The 16 MHz ST upgrade uses the same 8 MHz bus, provides a useful speedup of 40%, and there's even a 32 MHz (still on the 8 MHz bus) that doubles the speed in many cases.

Edited August 19, 2017 by Xebec

[ricortes]

I've run an accelerated 8 bit. There are solvable problems but you would end up with something of a birds nest under the hood. You lose things like video sync with the monitor, squished screen at lower then losing sync speeds, sound off key, SIO off speed. To be done right you would need someone technically proficient, OCD, and all the time in the world. I've done Bob's clock mod from his 80 column hack and I think that would be a good starting point. He used something like a 74LS191 counter with a 14.318 MHz crystal oscillator which provided a synchronous 14. 318 MHz signal to the dot clock and 3.58 MHz feed into the GTIA which then provides the 1.79 MHz system clock.

 

I suspect you may be able to do something like just run the acceleration during the VBI by routing/hot switching signals and maybe replacing the RAM with a SRAM but it is just a guess. You would need the GTIA run by the 3.58 signal and still running the system clock except for the CPU. This should keep POKEY running at 19k BAUD, screen refresh running at 60<50>/sec, sound right, ??? The processor would run at 3.58 MHz signal, same feed as the GTIA, but would slow down to 1.79 for any R/W to <$C000. It should still respond to ANTIC interrupts as normal to switch it out -> you need the extra hardware to do this. Kyle did a good job of tracking down an easy way to get a 65816 to work in one with them.

 

I guess that is about it but when you do the math, it is still a bit costly. Add money for the gotchas I missed, a 65816 since it doesn't make sense to do this with a 65C02, a PLD to do the signal routing, replacement SRAm, et al and you are getting up to the cost of a Rapidus.

 

There are probably other ways of doing it ~like Electro Trains did. Run an ARM processor that plugs into the 6502 socket. For that matter, it may be possible to run a lower processor like a AVR that just runs a 6502 emulator. Even the lowly AVR, PIC, and 8050 derivatives are running at 50x the speed of our 6502s. There is also that 6809 hack to replace our 6502! It can be done but a birds nests of options and confusion with a wad of money to toss at it.

[+bob1200xl]

You can make a bare-bones accelerator. This is a 7.16Mhz upgrade with just a 65816, SRAM, and two small PLDs.

 

 

Bob

 

 

 

 

[Kyle22]

That would look good in 800 CPU card form factor.

[guus.assmann]

Hello Kyle22,

 

Then it would not fit the 1200XL or 800XL/XE

 

BR/

Guus

[Kyle22]

Hello Kyle22,

 

Then it would not fit the 1200XL or 800XL/XE

 

BR/

Guus

Obviously.

[ricortes]

You can make a bare-bones accelerator. This is a 7.16Mhz upgrade with just a 65816, SRAM, and two small PLDs.

 

 

Bob

 

 

DSC01594.JPG

 

 

DSC01595.JPG

IMHO, should be updated for 44 pin processor, SRAM, and single PLD. As you ~said 'board real estate is expensive.' If this was reduced to ~half size and surface mount to decrease cost a bit, it would get me to open my notoriously closed wallet. I think I would start balking in the $40-$60 dollar range but that is just me.

[+Larry]

Hi Bob!
Your XL7 accelerator is a great item. 7.16 makes the Atari very "snappy." In fact, even with the XL14, I typically ran it at 7.16. And while that XL7 board shape could only fit in the 1200xl, the XL14 fit in all the XL's IIRC. Perhaps someone else could take the baton now and make the next leg of the journey?
-Larry

 

Edit: Do you still have the CPLD code? Or could the existing programmed ones could be read?