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Erik's ET-PEB


speccery

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I imagine a literal tiny peb would be something attractive. A small empty box with 8 or so cartridge ports that plugs into the side expansion port. The FDC, 32k, rs232, SAMS, etc are nothing more than cartridge sized PCBs that plug into each slot. to the TI it would appear as a normal sized PEB but "miniaturized" - That would be interesting indeed. A less expensive mini box customizable with mini cards ass per the end user's need. ??? But I digress - I think there's a dreamers topic here someplace for such musings.

 

In a cute 3D printed case that resembles the PEB :grin: That would be an interesting art project.

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Great work, Erik! All your TI work is really impressive and both inspiring and anti-inspiring at the same time :)

I wound up here because I've been thinking about cloning the PEB and some common peripherals with an ICE40 and LPC4337 to bridge past and present and take my TI knowledge to the next level. Now you've gone and done it first and at best I'll only ever appear to have copied your work :-D

 

But when I do get a little further along with my project and if I have trouble writing or debugging my DSRs, maybe you would be gracious enough to answer some of my questions. It is really wonderful to see the progress you are making, but then again after your FPGA softcpu this should be quite easy for you!

 

 

Thanks for the comments ollopa. I am very happy to answer any questions you might have.

 

It is interesting to note that you have pretty much the same components in mind as I did. I've acquired a small pile of development boards with chips that I'd like to use with the TI, and some chips too in anticipation of making some boards:

- LPCxpresso4337 board * 2

- LPC4330-Xplorer

- Icestick with ICE40HX1K * 2

- ICE40HX1K-EVB

- Icoboard (ICE40HX8K board for the Raspberry Pi)

- LPC4330 chips, LQFP-144

- XC6SLX9 chips, LQFP-144

- ICE40HX4K-TQ144 chips

- ICE40HX1K-VQ100 chips

 

I actually have so many FPGA development boards that's it is getting hard to remember them all... I've recently been testing the ICE40HX boards since they have the open source tool chain, and since they are very cheap. I am probably going to create just for my own amusement a couple more complex boards with FPGAs to plug into the TI. As you're interested in the ICE40 and LPC4337, perhaps that would be one to board type to put together. One of the "Ultimate PEB replacement" projects I have in mind is to indeed use the LPC4330 with FPGA. I have been thinking that this type of board could both be a PEB replacement, but also a replacement for the whole TI - by just turning the direction of the required 5V - 3V logic level translation buffers the bus would become driven by the board... Just slap on board a VGA connector and sound DAC and you have the whole TI on board. Then the extension bus could actually talk to a real PEB... or speech synthesiser or whatever.

Edited by speccery
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Erik,

 

You can get a little idea of what I have from this photo, though it's hard to find everything unless you know where to look ;)

post-43007-0-82938500-1520157815_thumb.jpg

 

It covers:

NXP/Freescale

LPC4337

LPC4367

MBED

LPC Link2 / LPC4370 triple core

LPC11U14

LPC1227

Kinetis K20

Kinetis K40

Kinetis KL25Z

QorIQ Power Architecture

 

ST

STM32F3

STM32F4

STM32L

 

TI

MSP430

Stellaris M4F120

SensorTag

InstaSpin DRV8312

InstaSpin BoostXL-DRV8301

 

Atmel

Just about everything under the sun (too much to list individually)...

All kinds of Tiny, Mega, Xmega, and Arduino boards

STK500

STK600

various XMEGA / Xplained boards

ATSAM9 ARM9 SoC

 

Xilinx

A few Spartan3 dev boards

A pack of old XC9572 CPLDs

 

Lattice

Olimex ICE40HX1K boards

ICE40HX1K-BLINK-EVN

ICE40LP1K-BLINK-EVN

ICE40HX8K-B-EVN

LCMXO2280C-B-EVN (MachXO CPLD)

 

I've been collecting for a while :grin:

 

Actually I just came across the Blackice-II board and I think it is perfect for starting TI projects, minus the need for 5v<->3v level converters. It has an ICE40HX4K (actually unlocked to 8K with icestorm tools), an STM32L433 Cortex M4, SD card slot, and 512k (256k x 16) SRAM on-board. There's enough IO broken out to interface to the sidecar port. Wowza!

 

If I follow your TI replacement idea, you could marry your FPGA TI clone with Finalgrom99 and the tiny PEB and still have an expansion port for talking to real hardware like the speech synth or real disks. I think that would be really fun and take up a lot less space (aka portable and wife-friendly) :)

 

By the way, I was thinking about the weird problems you were having with your state machine and I wondered if you were registering the off-chip IO or not. If not, that could very easily explain the timing problems you were having and also why adding more states to ensure your critical control signals are set last could fix the problem. I had some similar issues with the memory controller part of a VGA controller I did back in college and registering the outputs made a world a difference in real-world behavior.

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By the way, I was thinking about the weird problems you were having with your state machine and I wondered if you were registering the off-chip IO or not. If not, that could very easily explain the timing problems you were having and also why adding more states to ensure your critical control signals are set last could fix the problem. I had some similar issues with the memory controller part of a VGA controller I did back in college and registering the outputs made a world a difference in real-world behavior.

 

 

I have had all outputs registered all along, nothing is asynchronous.

 

That is a very nice collection of stuff! I started my electronics hobby again about 10 years ago and have since accumulated a fair amount of gear - although I think you have may have more development boards... I have also used Altera FPGA boards, so that may be something you don't have :)

 

The Blackice-II board seems to be nearly the same board as the myStorm board - thanks for the link. I've looked at the schematics of the myStorm board for a while. The "problem" are the 5V <-> 3V level shifters, or the lack of them... I've been planning to just put together a simple board with the ICE40HX4K, one of the LPC micro controllers I am familiar with, the level shifters and the TI expansion bus connector. I have already in my Pipistrello FPGA board project connected the TI to a Xilinx Spartan 6 LX45 chip, and in that project implemented 64 megs expansion for the TI (this was about 18 months ago). That is a massive FPGA, but the whole construction is not ideal as you end up with many wires between the TI and the FPGA system. So I'd like to build something that is simpler and repeatable...

 

It is interesting that the ICE40HX4K can be unlocked to be an 8K chip, that was news to me and certainly raises my interest level on that chip!

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Folks, here is a question just about anyone but me can quickly answer (remember I have never used a PEB & real disk drives with the TI): One of the lacking features I have is the ability to enumerate the files on a disk, i.e. to be able to make a directory listing. What do people usually use for that purpose? I remember seeing references to a Basic program "catalog" but for some reason I don't have it readily at hand. There are also those "disk manager" cartridges - is there a recommendation which one to use?

 

I am about to start making the functionality to create the directory listing with the microcontroller, but I figure it will be good to use widely used software for the TI for that purpose.

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Folks, here is a question just about anyone but me can quickly answer (remember I have never used a PEB & real disk drives with the TI): One of the lacking features I have is the ability to enumerate the files on a disk, i.e. to be able to make a directory listing. What do people usually use for that purpose? I remember seeing references to a Basic program "catalog" but for some reason I don't have it readily at hand. There are also those "disk manager" cartridges - is there a recommendation which one to use?

 

I am about to start making the functionality to create the directory listing with the microcontroller, but I figure it will be good to use widely used software for the TI for that purpose.

 

The following TI Basic program for producing the CATALOG of a disk is from the TI “Disk Memory System” manual:
100 CALL CLEAR
110 DIM TYPE$(5)
120 TYPE$(1)="DIS/FIX"
130 TYPE$(2)="DIS/VAR"
140 TYPE$(3)="INT/FIX"
150 TYPE$(4)="INT/VAR"
160 TYPE$(5)="PROGRAM"
170 INPUT "MASTER DISK(1-3)? ":A
180 A=INT(A)
190 IF A<1 THEN 170
200 IF A>3 THEN 170
210 OPEN #1:"DSK"&STR$(A)&".",INPUT,RELATIVE,INTERNAL
220 INPUT #1:A$,J,J,K
230 DISPLAY "DSK";STR$(A);" - DISKNAME= ";A$:"AVAILABLE=";K;"USED=";J-K
240 DISPLAY:"FILENAME SIZE TYPE P":"-------- ---- ---- -";
250 FOR LOOP=1 TO 127
260 INPUT #1:A$,A,J,K
270 IF LEN(A$)=0 THEN 350
280 DISPLAY:A$;TAB(12);J;TAB(17);TYPE$(ABS(A));
290 IF ABS(A)=5 THEN 320
300 B$=" "&STR$(K)
310 DISPLAY SEG$(B$,LEN(B$)-2,3);
320 IF A>0 THEN 340
330 DISPLAY TAB(28);"Y";
340 NEXT LOOP
350 CLOSE #1

It is the result of opening an un-named file with “DSKn.“ or “DSK.diskname.” The disk DSR provides this “file” by reading the information from the referenced disk when such an un-named file is opened. It is an INTERNAL/FIXED type file with exactly 128 38-byte records. Each record has 1 string field and 3 floating point number fields (9 bytes each). The string field is 11 bytes and provides for a disk/file name of up to 10 characters. The 3 floating point numbers provide numeric information about the disk (record 0) or a file (records 1 – 127).

 

...lee

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myStorm and Blackice are the same people. Blackice-II is the 4th iteration of their development board. I wish it had the level converters but at least they're cheap and simple to add.

I don't like doing board layout at all so if you put something together I would very interested in it :)

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It is the result of opening an un-named file with “DSKn.“ or “DSK.diskname.” The disk DSR provides this “file” by reading the information from the referenced disk when such an un-named file is opened. It is an INTERNAL/FIXED type file with exactly 128 38-byte records. Each record has 1 string field and 3 floating point number fields (9 bytes each). The string field is 11 bytes and provides for a disk/file name of up to 10 characters. The 3 floating point numbers provide numeric information about the disk (record 0) or a file (records 1 – 127).

 

 

...lee

Thanks Lee for the quick response!

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myStorm and Blackice are the same people. Blackice-II is the 4th iteration of their development board. I wish it had the level converters but at least they're cheap and simple to add.

I don't like doing board layout at all so if you put something together I would very interested in it :)

Thanks - I did not know this, I actually have been wondering where the project went, nice to know there is a product available!

Yes the converters are simple to add, but still a nuisance if they’re not on the same board. I’ve been wanting to put together this type of board now for a while, hopefully I have some time for that soon.

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I would love to get one of these to replace my PEB if I can still use my speech pak with it and it is affordable. I just want it to work as a 32k plus disk. Does it work plugged into the side of the speech pak? How much will it sell for?

I don’t have a price for this yet as it is work on progress. I have no manufacturing quotes yet, need to get everything working first to know the design is good. I’ve tried to use affordable components to keep the costs reasonable.

 

I think it should work with the speech synthesizer, although haven’t tested that yet. I believe there are some signals that the speech synth does not pass through, need to check those.

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After returning from Italy I had some hours to spend with the ET-PEB V2 PCB. The good news are that it does work and passes all tests so far (after fixing some solder blobs).

Side view

Unlike the V1 PCB, this version does not require any patch wires anymore.

Front view

While I was taking the photos the ET-PEB was running 256K AMS test and 32K normal test. No errors! Maybe the four layer board makes a difference...

Another side view

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So far so good with testing the new PCB.

 

Another thing I’ve been testing on the older PCB is another microcontroller, in order to have more flash memory space and room for interesting features. There are two alternative pin compatible chips. They are pretty much software compatible, but have somewhat different I/O register setup from the LPC1343 I’ve used and really enjoyed working with so far. Thus the code talking to I/O registers has to change. The two chips are: LPC11U37 and LPC1347. The latter would be faster (and I always lean towards faster) but I may go with the former, since it has twice the flash memory capacity at 128K. Amazing what can be had in a tiny package.

 

My test board uses the LPC11U37, and it now has working USB and SD card access with the ET-PEB I/O. I will probably assemble one of the V2 PCBs with this chip to see what happens.

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A quick update: I've been very busy at work and with helping my daughter in preparation to a major exam, not much time to work on this project. But it should be better on the coming weekend. Despite of that I had a little time to work on the project today. I've continued to work the SUBLNK (I guess that's the appropriate name) interface to the disk, but so far with not much progress. I guess I have to develop some test software to run against classic99 first, and once I understand how the application side works I can hopefully complete the DSR.

 

And a little teaser: Sometime ago I came up with a little weird but to me really cool way to use the ET-PEB to implement a new feature for the TI. It is something I dreamed up already a while ago, but I thought it requires a new interface board for the TI. As far as I know this idea has never been implemented as an expansion to any retro computer. I managed today to do a proof-of-concept of what I have in mind, that required some changes to the CPLD that I was able to squeeze in to the ET-PEB hardware. It also required a fair amount of coding on the micro controller, but as a result I have potentially a very interesting (to me) way of expanding the TI. I need to implement some more code to test what I have in mind, in addition to some cabling, but if I get this together I will definitely post a Youtube video about it... :)

Edited by speccery
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.

Something like this ?

 

DEVICE=SAMSMEM.SYS
BASIC=HIGH,UMB

DEVICE=DSK1.HRDRAMDISK.SYS /TESTMEM:OFF

DEVICE=DSK1.DISP_F18A.SYS

LASTDRIVE=DSKZ

DEVICE=WHT_ASPI8XB.SYS

DEVICEHIGH=CDROM.SYS /D:TICD1.

DEVICEHIGH=TIMOUSE.SYS /P:JOYST1

DEVICE=ANSI.SYS

SHELL=SCS1.4ADOS.SYS

COUNTRY=358

FILES=1

BUFFERS=99

FBLOCKS=INCLUDE

 

;-) :lust:

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And a little teaser: Sometime ago I came up with a little weird but to me really cool way to use the ET-PEB to implement a new feature for the TI. It is something I dreamed up already a while ago, but I thought it requires a new interface board for the TI. As far as I know this idea has never been implemented as an expansion to any retro computer. I managed today to do a proof-of-concept of what I have in mind, that required some changes to the CPLD that I was able to squeeze in to the ET-PEB hardware. It also required a fair amount of coding on the micro controller, but as a result I have potentially a very interesting (to me) way of expanding the TI. I need to implement some more code to test what I have in mind, in addition to some cabling, but if I get this together I will definitely post a Youtube video about it... :)

 

OK I now consider myself thoroughly teased!

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A quick question if someone here knows: I am debugging the SUBLNK interface of my DSR - I started from routine >14 "read sectors", and I get call in there from an application.

 

Thierry's page http://www.unige.ch/medecine/nouspikel/ti99/disks2.htm#Subprograms doesn't really explain other things than the scratchpad memory location use, and they are as explained, but are there some other things to take into account, namely can my DSR freely mess around with workspace registers, or am I supposed to leave them untouched?

The calling convention is not really explained here, but perhaps it is explained in somewhere else?

 

It seems to me that I am getting the right input parameters, but when the SUBLNK returns, things do not advance as planned. Could be a million things as I am debugging, but would be nice to know if there are some obvious things I am doing wrong. My DSR does access the VDP RAM to retrieve the filename etc, so the VDP memory pointer is modified too, but I guess that's ok. The DSR modifies registers R0-R3 and R7. On return the DSR executes INCT R11 followed by RT.

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A quick question if someone here knows: I am debugging the SUBLNK interface of my DSR - I started from routine >14 "read sectors", and I get call in there from an application.

 

Thierry's page http://www.unige.ch/medecine/nouspikel/ti99/disks2.htm#Subprograms doesn't really explain other things than the scratchpad memory location use, and they are as explained, but are there some other things to take into account, namely can my DSR freely mess around with workspace registers, or am I supposed to leave them untouched?

The calling convention is not really explained here, but perhaps it is explained in somewhere else?

 

It seems to me that I am getting the right input parameters, but when the SUBLNK returns, things do not advance as planned. Could be a million things as I am debugging, but would be nice to know if there are some obvious things I am doing wrong. My DSR does access the VDP RAM to retrieve the filename etc, so the VDP memory pointer is modified too, but I guess that's ok. The DSR modifies registers R0-R3 and R7. On return the DSR executes INCT R11 followed by RT.

 

Never mind I just realised that my code was actually now calling internally a subroutine (during VDP access), and it messed up R11 i.e. the return address. I am still trying to get used to the fact that the TMS9900 does not have a stack.

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