+Andrew Davie Posted May 30, 2003 Share Posted May 30, 2003 In the last few sessions, we started to explore the capabilities of the TIA. We learned that the TIA has "registers" which are mapped to fixed memory addresses, and that the 6502 can control the TIA by writing and/or reading these addresses. In particular, we learned that writing to the WSYNC register halts the 6502 until the TIA starts the next scanline, and that the COLUBK register is used to set the colour of the background. We also learned that the TIA keeps an internal copy of the value written to COLUBK. Today we're going to have a look at playfield graphics, and for the first time learn how to use RAM. The playfield is quite a complex beast, so we may be spending the next few sessions exploring its capabilities. The '2600 was originally designed to be more or less a sophisticated programmable PONG-style machine, able to display 2-player games - but still pretty much PONG in style. These typically took place on a screen containing not much more than walls, two "players" - usually just straight lines ? and a ball. Despite this, the design of the system was versatile enough that clever programmers have produced a wide variety of games. The playfield is that part of the display which usually shows "walls" or "backgrounds" (not to be confused with THE background colour). These walls are usually only a single colour (for any given scanline), though games typically change the colour over multiple scanlines to give some very nice effects. The playfield is also sometimes used to display very large (square, blocky looking) scores and words. Just like with COLUBK, the TIA has internal memory where it stores exactly 20 bits of playfield data, corresponding to just 20 pixels of playfield. Each one of these pixels can be on (displayed) or off (not displayed). The horizontal resolution of the playfield is a very-low 40 pixels, divided into two halves - both of which display the same 20 bits held in the TIA internal memory. Each half of the playfield may have its own colour (we'll cover this later), but all pixels either half are the same colour. Each playfield pixel is exactly 4 colour-clocks wide (160 colour clocks / 40 pixels = 4 colour clocks per pixel). The TIA manages to draw a 40 pixel playfield from only 20 bits of playfield data by duplicating the playfield (the right side of the playfield displays the same data as the left side). It is possible to mirror the right side, and it is also possible to create an "asymmetrical playfield" - where the right and left sides of the playfield are NOT symmetrical. I'll leave you to figure out how to do that for now - we'll cover it in a future session. For now, we're just going to learn how to play with those 20 bits of TIA memory, and see what we can do with them. Let's get right into it. Here's some sample code which introduces a few new TIA registers, and also (for the first time for us) uses a RAM location to store some temporary information (a variable!). There are three TIA playfield registers (two holding 8 bits of playfield data, and one holding the remaining 4 bits) - PF0, PF1, PF2. Today we're going to focus on just one of these TIA playfield registers, PF1, because it is the simplest to understand. ; '2600 for Newbies ; Session 13 - Playfield processor 6502 include "vcs.h" include "macro.h" ;------------------------------------------------------------------------------ PATTERN = $80 ; storage location (1st byte in RAM) TIMETOCHANGE = 20 ; speed of "animation" - change as desired ;------------------------------------------------------------------------------ SEG ORG $F000 Reset ; Clear RAM and all TIA registers ldx #0 lda #0 Clear sta 0,x inx bne Clear ;------------------------------------------------ ; Once-only initialisation... lda #0 sta PATTERN ; The binary PF 'pattern' lda #$45 sta COLUPF ; set the playfield colour ldy #0 ; "speed" counter ;------------------------------------------------ StartOfFrame ; Start of new frame ; Start of vertical blank processing lda #0 sta VBLANK lda #2 sta VSYNC sta WSYNC sta WSYNC sta WSYNC ; 3 scanlines of VSYNC signal lda #0 sta VSYNC ;------------------------------------------------ ; 37 scanlines of vertical blank... ldx #0 VerticalBlank sta WSYNC inx cpx #37 bne VerticalBlank ;------------------------------------------------ ; Handle a change in the pattern once every 20 frames ; and write the pattern to the PF1 register iny ; increment speed count by one cpy #TIMETOCHANGE ; has it reached our "change point"? bne notyet ; no, so branch past ldy #0 ; reset speed count inc PATTERN ; switch to next pattern notyet lda PATTERN ; use our saved pattern sta PF1 ; as the playfield shape ;------------------------------------------------ ; Do 192 scanlines of colour-changing (our picture) ldx #0 ; this counts our scanline number Picture stx COLUBK ; change background colour (rainbow effect) sta WSYNC ; wait till end of scanline inx cpx #192 bne Picture ;------------------------------------------------ lda #%01000010 sta VBLANK ; end of screen - enter blanking ; 30 scanlines of overscan... ldx #0 Overscan sta WSYNC inx cpx #30 bne Overscan jmp StartOfFrame ;------------------------------------------------------------------------------ ORG $FFFA InterruptVectors .word Reset ; NMI .word Reset ; RESET .word Reset ; IRQ END The binary for this code, and a snapshot of the output are included below. What you will see is our rainbow-coloured background, as before - but over the top of it we see a strange-pattern of vertical stripe(s). And the pattern changes. These vertical stripes are our first introduction to playfield graphics. Have a good look at what this demo does; although it is only writing to a single playfield register (PF1) which can only hold 8 bits (pixels) of playfield data, you always see the same stripe(s) on the left side of the screen, as on the right. This is a result, as noted earlier, of the TIA displaying its playfield data twice on any scanline - the first 20 bits on the left side, then repeated for the right side. Let's walk through the code and have a look at some of the new bits... PATTERN = $80 ; storage location (1st byte in RAM) TIMETOCHANGE = 20 ; speed of "animation" - change as desired At the beginning of our code we have a couple of equates. Equates are labels with values assigned to them. We have covered this sort of label value assignation when we looked at how DASM resolved symbols when assembling our source code. In this case, we have one symbol (PATTERN) which in the code is used as a storage location sta PATTERN ... and the other (TIMETOCHANGE) which is used in the code as a number for comparison cpy #TIMETOCHANGE Remember how we noted that the assembler simply replaced any symbol it found with the actual value of that symbol. Thus the above two sections of code are exactly identical to writing "sta $80" and "cpy #20". But from our point of view, it's much better to read (and understand) when we use symbols instead of values. So, at the beginning of our source code (by convention, though you can pretty much define symbols anywhere), we include a section giving values to symbols which are used throughout the code. We have a convenient section we can go back to and "adjust" things later on. Here's our very first usage of RAM... lda #0 sta PATTERN ; The binary PF 'pattern' Remember, DASM replaces that symbol with its value. And we've defined the value already as $80. So that "sta" is actually a "sta $80", and if we have a look at our memory map, we see that our RAM is located at addresses $80 - $FF. So this code will load the accumulator with the value 0 (that's what that crosshatch means - load a value, not a load from memory) and then store the accumulator to memory location $80. We use PATTERN to hold the "shape" of the graphics we want to see. It's just a byte, consisting of 8 bits. But as we have seen, the playfield is 20 bits each being on or off, representing a pixel. By writing to PF1 we are actually modifying just 8 of the TIA playfield bits. We could also write to PF0 and PF2 - but let's get our understanding of the basic playfield operation correct, first. lda #$45 sta COLUPF ; set the playfield colour When we modified the colour of the background, we wrote to COLUBK. As we know, the TIA has its own internal 'state', and we can modify its state by writing to its registers. Just like COLUBK, COLUPF is a colour register. It is used by the TIA for the colour of playfield pixels (which are visible - ie: their corresponding bit in the PF0, PF1, PF2 registers is set). If you want to know what colour $45 is, look it up in the colour charts presented earlier. I just chose a random value, which looks reddish to me ldy #0 ; "speed" counter We should be familiar with the X,Y and A registers by now. This is loading the value 0 into the y register. Since Y was previously unused in our kernel, for this example I am using it as a sort of speed throttle. It is incremented by one every frame, and every time it gets to 20 (or more precisely, the value of TIMETOCHANGE) then we change the pattern that is being placed into the PF1 register. We change the speed at which the pattern changes by changing the value of the TIMETOCHANGE equate at the top of the file. That speed throttle and pattern change is handled in this section... ; Handle a change in the pattern once every 20 frames ; and write the pattern to the PF1 register iny ; increment speed count by one cpy #TIMETOCHANGE ; has it reached our "change point"? bne notyet ; no, so branch past ldy #0 ; reset speed count inc PATTERN ; switch to next pattern notyet lda PATTERN ; use our saved pattern sta PF1 ; as the playfield shape This is the first time we've seen an instruction like "inc PATTERN" - the others we have already covered. "inc" is an increment - and it simply adds 1 to the contents of any memory (mostly RAM) location. We initialised PATTERN (which lives at $80, remember!) to 0. So after 20 frames, we will find that the value gets incremented to 1. 20 frames after that, it is incremented to 2. Now let's go back to our binary number system for a few minutes. Here's the binary representation of the numbers 0 to 10 00000000 00000001 00000010 00000011 00000100 00000101 00000110 00000111 00001000 00001001 00001010 Have a real close look at the pattern there, and then run the binary again and look at the pattern of the stripe. I'm telling you, they're identical! That is because, of course, we are writing these values to the PF1 register and where there is a set bit (value of 1) that corresponds directly to a pixel being displayed on the screen. See how the PF1 write is outside the 192-line picture loop. We only ever write the PF1 once per frame (though we could write it every scanline if we wished). This demonstrates that the TIA has kept the value we write to its register(s) and uses that same value again and again until it is changed by us. The rest of the code is identical to our earlier tutorials - so to get our playfield graphics working, all we've had to do is write a colour to the playfield colour register (COLUPF), and then write actual pixel data to the playfield register(s) PF0, PF1 and PF2. We've only touched PF1 this time - feel free to have a play and see what happens when you write the others. You might also like to play with writing values INSIDE the picture (192-line) loop, and see what happens when you play around with the registers 'on-the-fly'. In fact, since the TIA retains and redraws the same thing again and again, to achieve different 'shapes' on the screen, this is exactly what we have to do - write different values to PF0, PF1, PF2 not only every scanline, but also change the shapes in the middle of a scanline! Today's session is meant to be an introduction to playfield graphics - don't worry too much about the missing information, or understanding exactly what's happening. Try and have a play with the code, do the exercises - and next session we should have a more comprehensive treatment of the whole shebang. ============================== Exercises 1. Modify the kernel so that instead of showing a rainbow-colour for the background, it is the playfield which has the rainbow effect. 2. What happens when you use PF0 or PF2 instead of PF1? It can get pretty bizarre - we'll explain what's going on in the next session. 3. Can you change the kernel so it only shows *ONE* copy of the playfield you write (that is, on the left side you see the pattern, and on the right side it's blank). Hint: You'll need to modify PF1 mid-scanline. We'll have a look at these exercises next session. Don't worry if you can't understand or implement them - they're pretty tricky. ============================== Subjects we will tackle next time include... * The other playfield registers (PF0, PF2) * The super-weird TIA pixel -> screen pixel mapping * Mirrored playfields * Two colours playfields * Asymmetrical playfield See you then, then! kernel13.zip Link to comment Share on other sites More sharing options...
EricBall Posted May 30, 2003 Share Posted May 30, 2003 Just as an example, the maze in Skeleton+ is drawn using playfield graphics. In Pitfall, the playfield is used to draw the trees and the lakes (and probably more). Once you start programming, you will look at games in a whole new way and wonder "how did they do that?". And you may even be able to figure it out. Link to comment Share on other sites More sharing options...
Contieri Posted May 31, 2003 Share Posted May 31, 2003 Andrew, Thanks for the exercises! Cheers, Contieri Link to comment Share on other sites More sharing options...
Happy_Dude Posted May 31, 2003 Share Posted May 31, 2003 lda #$45 sta COLUBK ; set the Background colour ;------------------------------------------------ ; Do 242 scanlines of colour-changing (our picture) ldx #0 ; this counts our scanline number Picture stx COLUPF ; change coloulayfeildr colour (rainbow effect) sleep 40 ; WAIT;) lda #$45 ; Same value as COLUBK (don't "lda COLUBK";) ) sta COLUPF sta WSYNC ; wait till end of scanline inx cpx #242 bne Picture ;------------------------------------------------ I havent played around with the other PF's yet.... But loading COLUBK into COLUPF is also pretty bizarre Link to comment Share on other sites More sharing options...
+Andrew Davie Posted June 1, 2003 Author Share Posted June 1, 2003 The attached diagram shows the operation of the PF1 register, and which of the 20 TIA playfield bits it modifies. You can also see the colour-register to colour correspondence. Link to comment Share on other sites More sharing options...
dew2050 Posted June 5, 2003 Share Posted June 5, 2003 Quick question: What does the "LDA #%01000010" and "STA VBLANK" do near the end of the code? I know you are storing a binary value in the VBLANK register, but what does it do? Link to comment Share on other sites More sharing options...
Happy_Dude Posted June 6, 2003 Share Posted June 6, 2003 3.3 Vertical timing When the electron beam has scanned 262 lines, the TV set must be signaled to blank the beam and position it at the top of the screen to start a new frame. This signal is called vertical sync, and the TIA must transmit this signal for at least 3 scan lines. This is accomplished by writing a “1” in D1 of VSYNC to turn it on, count at least 2 scan lines, then write a “0” to D1 of VSYNC to turn it off. To physically turn the beam off during its repositioning time, the TV set needs 37 scan lines of vertical blanks signal from the TIA. This is accomplished by writing a “1” in D1 of VBLANK to turn it on, count 37 lines, then write a “0” to D1 of VBLANK to turn it off. The microprocessor is of course free to execute other software during the vertical timing commands, VSYNC and VBLANK. Link to comment Share on other sites More sharing options...
Emehr Posted June 6, 2003 Share Posted June 6, 2003 Concerning the VBLANK register... This address controls vertical blank and the latches and dumping transistors on the inputports by writing into bits D7, D6 and D1 of the VBLANK register. D7 D6 D1 D1 [ 1 = start vert. blank, 0 = stop vert. blank] D6 [ 1 = Enable I4 I5 latches, 0 = disable I4 I5 latches] D7 [ 1 = dump I6I1I2I3 ports to ground, 0 = remove dump path to ground] Note : Disable latches (D6 = 0) also resets latches to logic true The two lines... LDA #%01000010 STA VBLANK ...set bit 6 and bit 1 of the VBLANK register. For more on the latches in question... 12.2 Latched Input Ports (INPT4, INPT5)These two ports have latches that are both enabled by writing a "1" or disabled by writing a "0" to D6 of VBLANK. When disabled the microprocessor reads the logic level of the port directly. When enabled, the latch is set for logic one and remains that way until its' port goes LO. When the port goes LO the latch goes LO and remains that way regardless of what the port does. The trigger buttons of the joystick controllers connect to these ports. Hope that helps. -Jason Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted June 6, 2003 Share Posted June 6, 2003 I don't think bit 6 is important right now. Right Andrew? Link to comment Share on other sites More sharing options...
EricBall Posted June 6, 2003 Share Posted June 6, 2003 Just for clarity (since this is 2600 programming for newbies), the VBLANK register contains three flags, which have the following properties: bit 1 causes the TIA to display black, irrespective of what the graphics and color registers are set to. This is typically used during the vertical blanking interval - the 70 NTSC or 84 PAL lines which are not part of the active display. There is no requirement to use it (instead of updating the graphics and/or color registers) and it can be used outside to the vertical blanking interval too. bit 6 causes the TIA to latch the joystick buttons. When the player presses the button, bit 7 of INPT4 (left) or INPT5 (right) will go to 0 and stay 0 even if the button is released. When the latch is disabled bit 7 INPT4/5 will be 1 when the button is released, and 0 when the button is down. bit 7 causes the TIA to reset the capacitors used by the paddles. To read the paddles, the game first sets this bit to 1 for a short period of time. It then sets it back to 0 and counts the number of lines until bit 7 of INPT0-3 changes to 1. Link to comment Share on other sites More sharing options...
dew2050 Posted June 6, 2003 Share Posted June 6, 2003 Thanks for the explanations. My first exposure to 2600 programming was Kirk Israel's "2600 101" tutorial. He doesn't use this VBLANK technique on his sample kernels, so seeing it here got me curious. Even though this isn't required, is it good programming practice to have it at the end of the kernel loop? Link to comment Share on other sites More sharing options...
EricBall Posted June 8, 2003 Share Posted June 8, 2003 Even though this isn't required, is it good programming practice to have it at the end of the kernel loop? Yes and no. It is a good idea to display black during the vertical blanking interval, but how you accomplish this depends on your kernel. It may be just as easy to clear the graphics registers or the color registers. Even if you use VBLANK to display black, you often need to clear the other registers so nothing is displayed at the top of the frame when you turn VBLANK off. Link to comment Share on other sites More sharing options...
datafry Posted July 17, 2003 Share Posted July 17, 2003 Andrew or anyone else.. I seem to have an "extra" (probably not the correct word) 3 scan lines at the top before the colors start displaying.. I've tested this on z26 and stella and get the same result.. I"ve also converted it to wav and loaded it up on my 2600's supercharger and still the same.. If I take 3 WSYNC's out of the 37 during the vertical blank everything seems to line up correctly. ie: ;------------------------------------------------ ; 37 scanlines of vertical blank... ldx #0 VerticalBlank sta WSYNC inx cpx #37 bne VerticalBlank ;------------------------------------------------ to ;------------------------------------------------ ; 37 scanlines of vertical blank... ldx #0 VerticalBlank sta WSYNC inx cpx #34 ;changed from 37 bne VerticalBlank ;------------------------------------------------ Any ideas why this happens?[/code] Link to comment Share on other sites More sharing options...
Eckhard Stolberg Posted July 18, 2003 Share Posted July 18, 2003 Andrew or anyone else.. I seem to have an "extra" (probably not the correct word) 3 scan lines at the top before the colors start displaying.. I've tested this on z26 and stella and get the same result.. I"ve also converted it to wav and loaded it up on my 2600's supercharger and still the same.. If I take 3 WSYNC's out of the 37 during the vertical blank everything seems to line up correctly. Any ideas why this happens? Andrew's demo is only displaying 192 active scanlines. This is what Atari suggested to it's programmers to make sure that their games would be fully visible even on very old TVs (TV that were old even in 1977). A modern NTSC TV is probably able to display a little more than 200 visible scanlines. Also the emulators are using screenmodes with at least 200 scanlines. Therefore it's completely normal to have some unused scanlines above and below the display of a VCS game. Ciao, Eckhard Stolberg Link to comment Share on other sites More sharing options...
datafry Posted July 18, 2003 Share Posted July 18, 2003 Ahh I remember reading that yet, it didn't register.. thx Link to comment Share on other sites More sharing options...
chadtower Posted September 4, 2003 Share Posted September 4, 2003 Okay, weird one. Using the exact code, cut and pasted from above, when I compile it and then play it in z26, it has a portion of the screen that is just black. It's not above or below the image, it's inside of it, all the way across the screen, near the bottom. it's probably 20% of the scanlines. There is the rainbow effect above it and below it... what's going on? Link to comment Share on other sites More sharing options...
kisrael Posted September 5, 2003 Share Posted September 5, 2003 Okay, weird one. Using the exact code, cut and pasted from above, when I compile it and then play it in z26, it has a portion of the screen that is just black. It's not above or below the image, it's inside of it, all the way across the screen, near the bottom. it's probably 20% of the scanlines. There is the rainbow effect above it and below it... what's going on? Another datapoint...I got the same result. Plus on a supercharger, it rolls! Hrrm...comparing this kernal to my kernal...it looks like maybe lda #0 sta VBLANK should come after the loop for vertical blank, not before? Link to comment Share on other sites More sharing options...
kisrael Posted September 5, 2003 Share Posted September 5, 2003 BTW, I like this choice of demo...I really think that visibly counting in binary is a lovely thing for a computer to be doing. Link to comment Share on other sites More sharing options...
Eckhard Stolberg Posted September 6, 2003 Share Posted September 6, 2003 Hrrm...comparing this kernal to my kernal...it looks like maybe lda #0 sta VBLANK should come after the loop for vertical blank, not before? That's right. Writing #0 to VBLANK will re-enable the output of the TIA. Since the demo above does it right before it's telling the TV to move the beam back to the top of the screen, z26 will show one line of graphics at the bottom of the display in some of the video modes. On a real TV you won't see this, because it would be happening in the non-visible parts of the frame. Also the rolling happens because of this too. Some TV/VCS combinations won't recognize a proper sync signal, if VBLANK isn't turned on during the three lines of VSYNC. I've have that problem with my old PAL TV and a 2600jr, that was also incompatible with Kool Aide Man. For PAL users it is generally a good idea to have VBLANK turned on during the overscan and the VBLANK part of the frame in a 60Hz game. Otherwise the black bar at the top and bottom of the frame will have this spooky glow, because the electron beam is still turned on while it's moving back to the top of the screen. Ciao, Eckhard Stolberg Link to comment Share on other sites More sharing options...
EricBall Posted September 7, 2003 Share Posted September 7, 2003 Also the rolling happens because of this too. Some TV/VCS combinations won't recognize a proper sync signal, if VBLANK isn't turned on during the three lines of VSYNC. I've have that problem with my old PAL TV and a 2600jr, that was also incompatible with Kool Aide Man. VBLANK specifically, or will turning off everything (with COLUBK=black) work as well? Link to comment Share on other sites More sharing options...
Eckhard Stolberg Posted September 7, 2003 Share Posted September 7, 2003 It happens on the same 2600jr (and 7800s in 2600 mode) that also have syncing problems when you try to do anything during the three lines of VSYNC (You might have seen me bringing that up on Stella list once or twice. ), so I'm sure that it has to be VBLANK specifically. Ciao, Eckhard Stolberg Link to comment Share on other sites More sharing options...
MestreLion Posted September 15, 2003 Share Posted September 15, 2003 Hrrm...comparing this kernal to my kernal...it looks like maybe lda #0 sta VBLANK should come after the loop for vertical blank, not before? I have the same doubt... shouldnt VBLANK, for the sake of "style", or "good programming", be turned off just *after* the 37 vblank? Also, that way, it wouldnt be necessary to turn off all graphics and set all colous to black - VBLANK would to the trick by itself (as it is supposed to do). So, is there any reason why its not done that way in kernel's templates? With this concern, and other little things, and also for the sake of practice (im a newbie to the bone in VCS programming), i tried to re-write the kernel template in a way it "sounds" better, according to the info given by Andrew's amazing tutorial. Its heavily commented, to point out how and specially why I changed some stuff... can someone please tell me if the code OK, in terms of accuracy, style, and and good programming procedures? Z26 tells 262 @ 62 fps, and its visually perfect - no chopped off lines, no visible lines that should be visible or vice-versa. But hey, i've just started, and im sure that, as this is different from the standard, may be full of hidden mistakes, traps, bad techiniques, that are so far obscure to me. StartOfFrame ; Start of new frame - VBLANK is still ON ; As VBLANK is supposed to be ON, so I removed ; the first 2 lines and placed them after ; the 37 vblank lines lda #2 sta VSYNC sta WSYNC sta WSYNC sta WSYNC ; 3 scanlines of VSYNC signal ;------------------------------------------------ ; 37 scanlines of vertical blank... ; this comment has moved up to clearly show that ; the next lines are already part of the 1st vblank line ldx #0 ; Tuning off VSYNC is done in the stx VSYNC ; 1st VBLANK line, correct? VerticalBlank sta WSYNC inx cpx #37 bne VerticalBlank ;------------------------------------------------ ; Do 192 scanlines - Begin of the 1st line ; this comment has moved up too, for the same reasons as above: ; next lines are already done on 1st visibe line, ; (as well as the last 3 instructions above, when executed ; in the last loop - so 1st line has actually less time then ; the others) ldx #0 ; this counts our scanline number stx VBLANK ; and this turns VBLANK off Picture sta WSYNC inx cpx #192 ; are we at line 192? bne Picture; No, so do another ;------------------------------------------------ ; 30 scanlines of overscan... ; As above, last 3 instructions and next 2 lines ; are done in the 1st overscan line, where VBLANK ; must be set as soon as possible. But what if, ; when game logic increases, its not possible to ; turn it on before the horizontal blanking ends? ; Will a 193rd line be visible, or worse, ; chopped in the middle? lda #%01000010 sta VBLANK ; end of screen - enter blanking ; as VBLANK is ON in every line from now on till ; the 1st visible line, there is no need to reset ; graphics or colours to black (and thus no need to turn ; them on again in the beggining of next frame ; Is this really an amazing achievement I should be proud of ; (LOL), or something I shall not bother cos its makes no ; difference at all? ldx #0 Overscan sta WSYNC inx cpx #30 bne Overscan jmp StartOfFrame So, any comments? Link to comment Share on other sites More sharing options...
Happy_Dude Posted September 15, 2003 Share Posted September 15, 2003 Yes turning VBLANK off "after" the Vblank loop is good programing practice. the only thing I'd suggest would be this ldx #37 VerticalBlank sta WSYNC dex bne VerticalBlank stx VBLANK The loop exits when X is 0 so you save yourself 2 bytes of rom by not loading 0 You also only need to set bit 1 of VBLANK to turn it on so if you: lda #2 sta VBLANK then by the time you get to VSYNC, A still equals 2. Just saved 2 more bytes And even when you need bit 6 set, it doesn't affect VSYNC Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted September 15, 2003 Share Posted September 15, 2003 Usually it's better (no extra compare, less CPU cylces inside the loop) to count down the loop variables down to zero (bne) or -1 (bpl). And, as Happy_Dude already (partially ) showed, there is plenty of optimization, but I think that might not be important for you right now. Link to comment Share on other sites More sharing options...
kisrael Posted September 15, 2003 Share Posted September 15, 2003 Usually it's better (no extra compare, less CPU cylces inside the loop) to count down the loop variables down to zero (bne) or -1 (bpl). Yeah, that was one relatively "quirky" thing about Andrew Davie's tutorials so far, most of them to do count up not down. I assumed he did that to try and avoid confusing the issues 'til a later point. And, as Happy_Dude already (partially ) showed, there is plenty of optimization, but I think that might not be important for you right now. JoustPong is living proof that you can get quite a bit done without too much optimization smarts...for many only moderately ambitous games, the only place you need to optimize is the kernal where you're drawing the scanlines. Link to comment Share on other sites More sharing options...
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