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Overclocking the Stock 6502c: Is it Possible?


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11 hours ago, reifsnyderb said:

I am thinking that a slight modification to the Atari 400/800 6502B circuitry would allow the W65C02 to work without using the buffers thebyteattic guy adds.  (Slight changes would be needed because of the W65C02's inclusion of the BE line.)

Although I never tested it, the circuit I showed in this post is done without buffers.

 

Although after watching the Byte Attic Pimp my Eight episode 6 part 3 video, and seeing how the clock is suspended at just the right moment upon Antic take-over from the CPU, I suspect the accelerated clock switch-over part of my circuit might cause glitching.

I did mine with buffering, as I do believe there would be real issues, as he points out in the video, without it. There are a few signals that he also buffers that seem unwarranted, but not all.

27 minutes ago, selgus said:

I did mine with buffering, as I do believe there would be real issues, as he points out in the video, without it. There are a few signals that he also buffers that seem unwarranted, but not all.

Probably the easiest way to prove or dis-prove whether buffers are needed is to test this out on an Atari 400/800...with an adapter for the minor pin differences.  An adapter can probably be rigged up with a couple of stacked sockets as I've done that in the past.  I'll order a 40 pin W65C02, with my next chip order, and test this to find out.  The biggest drawback is if I figure this out I'll have to modify my Atari 400/800 CPU & Video board to support the W65C02 as well.   🙂

 

14 hours ago, mytek said:

His video where he goes step by step through how Atari implemented a stock 6502 in the first 400/800 series machines is absolutely brilliant

Thanks for the link.

 

BITD I did a similar analysis but I drew a timing diagram to better understand it. It revealed a critical timing requirement which might explain why they used the 7474 instead of 74LS74.

 

20221123_141119.jpg

  • Like 8

Is there a difference between a 6502 and 65816 as regards using it for a replacement for Sally?  I know that there are a very, very few things that will not run correctly with a 65816.  A drop-in for Sally cpu's has already been done at least twice -- "Sweet-16" and also one by Guus Aussman (sp?), IIRC.  The S-16 still had a few minor issues, so maybe this one from the video is better?  I still have  a working Sweet-16, assuming I could find it.

 

 

1 hour ago, ClausB said:

Thanks for the link.

 

BITD I did a similar analysis but I drew a timing diagram to better understand it. It revealed a critical timing requirement which might explain why they used the 7474 instead of 74LS74.

 

I can confirm that a 74F74 works fine along with a 74LS02 and 2 74LS244's as I've been using those with my Atari 400 S-Video boards.

 

 

 

  • Like 2

It looks like the Apple I replacement notes apply if a W65C02 chip is used.  (https://www.westerndesigncenter.com/wdc/AN-002_W65C02S_Replacements.php)

 

Pin 1 would be disconnected as, on the Atari, it's tied to ground.

Pin 5 doesn't apply as, on the Atari, it's NC.

Pin 36 needs to get tied to +5VDC.

Finally, the Atari has the RDY pin pulled high.

 

So, there's only 2 pins to be concerned with to test the theory.    🙂

 

 

2 hours ago, reifsnyderb said:

I can confirm that a 74F74 works fine along with a 74LS02 and 2 74LS244's as I've been using those with my Atari 400 S-Video boards.

Do you have the min prop delay specs for the 74F74?

14 minutes ago, ClausB said:

Do you have the min prop delay specs for the 74F74?

https://www.mouser.com/datasheet/2/308/74F74-1190299.pdf

 

Minimum prop delay is around 3.2ns and the average is around 6ns.  I've found 74F chips work well unless I need a longer delay for some reason.

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Ok.  1 W65C02 is ordered, along with a some 40 pin sockets.  They should be here on Monday and I'll test the W65C02 in my gutted Atari 400 system shortly afterwards.   🙂

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You might want to try a 74AC74. It has different switching levels than the 74F74 and is very fast. AC parts work like CMOS, F parts look like TTL. 74ACxx parts may work better with a CMOS CPU or memory.

 

Bob

 

  • Like 2
4 hours ago, bob1200xl said:

You might want to try a 74AC74. It has different switching levels than the 74F74 and is very fast. AC parts work like CMOS, F parts look like TTL. 74ACxx parts may work better with a CMOS CPU or memory.

 

Bob

 

I'll take a look at the datasheet.  Thanks!

If the W65C02 test works my next step is to try this on an XL.  I figure I'll just make up a test PBI board and run a few extra jumpers to see if it works.  I have the ATF16V8 shown in registered mode as I figure I'll need a latch or 2.  I may change a few things yet.  There are some extra connections going to the ATF16V8 and I may not need them.  But, just in case, they are there anyhow.  This is just a test plan.  Using a PBI board will eliminate having to run too many wires all over the place.  

 

My theory is that it's critical that the change in speed be synchronized with the rising edge of the CPU's Phi1.  On a 800, /HALT stops the CPU on the rise of Phi1...which is where Phi2 goes low to start the cycle.  So changes in speed due to addressing also need to be done when Phi1 rises.  On an 800, Phi1 comes off of Z302A, pin 6.  (First pic, below.)

 

Only part of the test circuit is shown (2nd pic) due to the fact that it's too big to take a screenshot and be able to read the whole thing.  The ATF16V8 will be used to coordinate the timing change due to addressing and /HALT.  Also, the ATF16V8 is being used to enable/disable a AS6C1008 that is off the right edge of the schematic.  Off the bottom edge of the schematic is a ICS501 that is tied to the oscillator input on the GTIA.  I eliminated Z303 and Z304 (first pic) as the W65C02 has a buffer enable pin on pin 36.  (2nd pic)  I figure that I can control the buffer enable from the ATF16V8 chip.

 

To run the test, the board will be plugged into the PBI and the Sally chip removed.  The other jumpers will also be connected.  The first step will be to get the W65C02 working just at the normal clock speed.  Afterwards, the ATF16V8 will be re-programmed to allow for a 2x turbo speed.  A 4x turbo speed will follow.

 

I'll lay out the board if the W65C02 test works in the Atari 400.

 

turbo1.thumb.png.dbdaf71cc71dd6cb8df6009130fbc6ae.png

 

turbo2.thumb.png.8a333419456db2a988d7984977d1cf8b.png

 

 

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You might want to also check out the following parts of the Byte Attic SALLY Replacement Series which gets into a few more timing issues that were discovered and the solutions thereof.

 

Pimp My Eight, episode 6, part 4

 

Pimp My Eight, episode 6, part 5

 

 

  • Like 1
12 minutes ago, mytek said:

You might want to also check out the following parts of the Byte Attic SALLY Replacement Series which gets into a few more timing issues that were discovered and the solutions thereof.

 

Pimp My Eight, episode 6, part 4

 

Pimp My Eight, episode 6, part 5

 

 

I've seen those videos.  I am wondering if these timing issues weren't created by adding the transceiver.  If the W65C02 arrives on Monday, I hope to find out if it can be used as an almost drop-in replacement on the Atari 400/800.

 

 

 

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Not sure if it's 100% related, but Nolan Bushnell in the interview for the Atari 50th Anniversary said that since Atari would order so many chips, they would have the manufacturer print wrong info on the chip itself to thwart copiers. He said one of the companies that would copy the hardware ended up going bankrupt because they bought so many wrong chips. Interesting story anyway!

  • Like 1
  • Haha 1

W65C02 SUCCESS!

😎😎😎😎😎😎😎

 

 

The W65C02 arrived today.  I installed a socket and made the following "adjustments".  Pin 1 was bent out so as to float.  On the 6502B this pin goes to ground but on the W65C02, this pin goes to VPB...which isn't used on the Atari.  The other change was on pin 36.  On the W65C02, pin 36 is a bus enable (BE) pin.  If this pin is high, the address bus, data bus, and read/write pin are enabled.  If this pin is low, all those pins go into high impedance state.  I tied this pin to pin 5 of the 74F74 latch that times and holds the /halt signal in place.  (The equivalent chip is Z302A as per the Atari 800's CPU board schematic.)  So, when /halt is high the W65C02 bus's are enabled and vice versa.  The addition of the BE also would make Atari's use of chips Z303 and Z304 redundant.  (These chips are still needed for compatibility with the 6502B, of course.)  I used the Atari 400 CPU/Video board of my own design to accomplish this as this board is already setup for S-Video output.  My board is also capable of running either a Sally CPU or a 6502B CPU.  So, it just had to be setup for a 6502B and have the 2 additional changes described.  M.U.L.E. ran for about 15 minutes until I shut it down.  Star Raiders also works.  I tried the Side3 Cartridge and that works.  The newest PacMAN Arcade works.  SysInfo v.2.24 works as well.  I'll leave the chip in the Atari 400 for the time being.

 

The 2 caveats are that the W65C02 does not handle the "undocumented" instructions and there is a possibility that my success with it is some sort of edge case.  My feeling on this matter, though, is that since Western Design has instructions on how to use their chip in Apple computers that this baby will work fine.

 

 

 

w65c02.thumb.JPG.4a3c5bc449c71d10ddded5cdcd3759f0.JPG

Edited by reifsnyderb
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I finished up the test board for turbo mode in an XL.  It will plug into the PBI and require 6 more connections, at minimum, for the test.  The board, esthetically, is a little rough.  But it's only for running a cheap feasibility test.  I chose to make it a PBI board because it saves me from running a lot of jumper wires.  The Sally chip will, of course, be removed from the system board and the W65C02 will be running on the test board.  Keeping it 2 layers makes it as cheap as possible.   🙂

 

U3 will be a 128k SRAM chip (AS6C1008) because I have some of those around.  JP3 and JP4 are to move the BE pin on the W65C02 to run off of the ATF16V8 (U2), if necessary.  J2 has all the connections needed to go to the system board.  J3 is the additional /s4 and /s5...if I chose to connect them and test with them.  U4 is the clock multiplier chip that will be connected to the clock as it goes into the GTIA.  U401 and U402 are wired up like on the Atari 400/800 so as to allow ANTIC to halt the CPU at the proper time.  The ATF16V8 (U2) will be used to use the AS6C1008 SRAM and to throttle the CPU speed by either providing the fast clock or the slow clock depending upon /halt and the address called by the CPU.

 

turbo_test_board.thumb.JPG.bbc151b651a6e3963a29fac94a5f0b4d.JPG

Edited by reifsnyderb
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