TMS99105A Bit Manipulation Instructions

[adel314]

I was wondering if anyone with a TMS99000 based system has tested the TMB, TCMB and TSMB instructions on a TMS99105A?   I have a project where they would be very useful if I could get them to work and was looking for confirmation that they were actually implemented correctly on the TMS99105.   

                        _ifix::
                        ifix::
  0398   02AD             			STWP	WP
                          ;;;;;;;;;;;;;;;;;;;;;;;
  1000                  BIND:		EQU			1000H
  039A   04C3           			CLR			R3
  039C   0204 FFFF      			LI			R4,0FFFFH
  03A0   C804 1000      			MOV			R4,@BIND
  03A4   0C09 01A3      			TMB			@BIND(R3),6
  03A8   1000           
  03AA   1302           			JEQ			BIND2
  03AC   2E84           			WHEX		R4
  03AE   2DC0           			RET
                        
  03B0   2E83           BIND2:		WHEX		R3
  03B2   2DC0           			RET
                        
                           ;;;;;;;;;;;;;;;;;

The code running of the code behaves which leads me to suppose that the OPCODES are recognised but the ST2 bit appears to the opposite of what is in the manual that I have.   Here is a test that prints out "FFFF" when according to the data manual it should print out "0000"

 

 

Any help would be greatly appreciated.

 

Thanks

Alex

[matthew180]

You're probably not getting any response because the 99000 and 99105 were very late CPUs in the era, and never used in a computer that anyone here had (mostly).  There are only two people in this forum that I know of who have a computer with the 99105, and that is *only* because they built that computer themselves.

 

Since 99105 *was* used commercially, IIRC, so I'm sure its instructions work.

 

Looking at the code, my first question is, what computer is this running on, and do you have RAM at address 1000H?  The instruction: MOV R4,@BIND expects to be able to write to 1000H (the value that BIND is equated to).

 

TMB should be testing bit 6 of with word at address 1000H, which should be FFFFH, if address 1000H is RAM.  So TMB will move bit-6 of address 1000H to stats flag ST2 (equal flag), which is tested by the JEQ instruction.  So I would expect the code to jump to label BIND2, where is will do whatever WHEX is on the value in R3, which is 0000H.

 

My first instinct is, address 1000H is not RAM, so the FFFFH is not being written to it, and the data being tested by TMB is something else with bit-6 being clear.

 

[adel314]

Thanks Mathew180 - yes your interpretation is correct, and I do have RAM at 1000H.   I built a SBC around the TMS99105 in the late 80s and have just woken it up and am writing an OS for it - it has a full 64K (32k Words) and I intend to expand it once I have everything running.   I have been doing a great many tests against my original TMS99105A which was marked "X for experimental" so thinking that could have been behind it, I purchased another CPU on ebay and that has the same issue.   

 

What I am beginning to think is that it may be something to do with the BST1 to BST3 coding - but I am guessing.  If as you say the implementation on the chip is correct I am going to assume that and avoid the instructions. ?

 

Thanks again

[Gary from OPA]

i used to have a 99105 working setup, i plan to assemble one again soon, parts are on order.

 

the 99105 if the A version with TMS in front should be fine, there was some buggy ones but that are labelled normally with TMP or TMX and the 99115 was also buggy, the native p-code addon had errors in it.

Edited July 2, 2020 by Gary from OPA

[adel314]

The one I have looks okay it is clearly labelled TMS99105A JDL.   When I received the manual - stapled on the rear cover was the ERRATA sheet (attached) which only covers a hardware error for the MPY instruction but it has made me think that there were probably other problems.   I only came across the TMB type instructions recently as this has been the first time I have tried to use them - I still have some hair left !

 

By the way, I notice that the ERRATA note also refers to the 99105,99110 and 99105A as having the bug.

 

 

[matthew180]

Have you tried the TMB instruction on an all zero value? Maybe it is working opposite. At least in that case it would be usable.

[adel314]

Yes, I did and I think it did work in reverse but the TCMB and TSMB just failed to work under any condition - so all that has done is dented my confidence in these instructions and have decided to abandon them.   

 

Initially I was hoping that I had misinterpreted the opcode and method but after reading a TMS99000 manual that I found  on this site it appears that my coding in the assembler was correct.   

[Stuart]

I've tried TCMB, TSMB and TMB with my 99105 and 99110 and they appear to work as expected.

 

With the code exactly as below it detects that bit 6 of TSTVAL is high and resets that bit.

 

If I comment out the TCMB instruction and uncomment TSMB, and change the value of TSTVAL to >0000, it detects that bit 6 of TSTVAL is low and sets that bit.

 

I checked TMC in a similar way and and that worked OK as well.

 

Trying code very similar to your original, I get "0000".

        AORG >8000       Assemble at the bottom of RAM.
        
START   LWPI WS          Set workspace.

        CLR  R3

        DATA >0C0A       TCMB (Test and Clear Memory Bit) opcode.
*        DATA >0C0B       TSMB (Test and Set Memory Bit) opcode.
        DATA >01A3       Source operand in binary 000000 0110 10 0011 = bit displacement 6, indexed R3.
        DATA TSTVAL

        JEQ  BITHIGH
        XOP  @BLTXT,14
        JMP  PRNTRLT

BITHIGH XOP  @BHTXT,14

PRNTRLT XOP  @CRLF,14    Print result value.
        XOP  @TSTVAL,10
        XOP @CRLF,14
        
        B @>0080         Return to monitor.
        
WS      BSS 32           Workspace.

TSTVAL  DATA >0200

CRLF    BYTE >0A,>0D,>00

BHTXT   BYTE >0A,>0D
        TEXT 'BIT IS HIGH'
        BYTE >0A,>0D,>00

BLTXT   BYTE >0A,>0D
        TEXT 'BIT IS LOW'
        BYTE >0A,>0D,>00
        END

 

 

Edited July 3, 2020 by Stuart

[adel314]

Hello Stuart and thankyou very much for your taking the time have a look at this.   

 

My tests were carried out within a larger programme and the testing was a little ad hoc so I have taken the time code up your example and to add all three instructions.  And so, this is where I look silly!  Yes they do work, so I can only assume that when I was testing them in my original code that they were failing due to another issue - which I discovered only yesterday (the dirty details as that I had an instruction of the form MOV @*R4,R0 which my assembler coded as indirect but allowed and the symbolic address which caused a misalignment of PC - and this very likely caused the issue)   

 

Anyway, you are correct and the instructions do work as intended (Listing Attached with results) - thankyou.

 

Alex 

 

R0	EQU 0
R1	EQU 1
R2	EQU 2
R3	EQU 3
R4	EQU 4
R8	EQU 8
SL	EQU 9
SP	EQU 10
WP	EQU 13
R11	EQU 11

	DXOP CALL,6
	DXOP RET,7
	DXOP PUSH,8
	DXOP POP,9
	DXOP WHEX,10
	DXOP WRITE,12    ;WRITE CHAR IN MSB 
	DXOP MESG,14	 ;OUTPUT NULL TERMINATED MESSAG
MONITOR  EQU  0E600H

 	AORG 8000H       ;Assemble at the bottom of RAM.

START   LWPI 	WS          ;Set workspace.
		BLWP	@MONITOR

        CLR     R3

        JMP		BYPASS

;        DATA 	0C0AH       ;TCMB (Test and Clear Memory Bit) opcode.
;       DATA 	>0C0B       ;TSMB (Test and Set Memory Bit) opcode.
;        DATA 	01A3H       ;Source operand in binary 000000 0110 10 0011 = bit displacement 6, indexed R3.
;        DATA 	TSTVAL
;
;TEST TCMB
BYPASS 	TCMB	@TSTVAL(R3),6
        JNE  	BY1
        BL		@BITHIGH
        JMP		BY1+4
BY1:	MESG	@BLTXT
		BL		@PRNTRLT

;TEST TSMB
TEST2:	TSMB	@TSTVAL(R3),6
       	JNE		T2A
        BL		@BITHIGH
        JMP		T2A+4
T2A:	MESG	@BLTXT
        BL		@PRNTRLT

;TEST TB
TEST3:	TMB		@TSTVAL(R3),6
       	JNE		T3A
        BL		@BITHIGH
        JMP		T3A+4
T3A:	MESG	@BLTXT
        BL		@PRNTRLT

        B 		@0F000H         ;Return to monitor.


BITHIGH MESG	@BHTXT

PRNTRLT MESG	@CRLF    		;Print result value.
        WHEX	@TSTVAL
        MESG	@CRLF
        RT

Results are below

 

 >> TMS9900 MONITOR V2.1 <
   >
   >8000G
BIT IS HIGH

0000

0000

BIT IS LOW

0200

BIT IS HIGH

0200

0200

 

Edited July 4, 2020 by adel314

[+retroclouds]

Mind sharing some details on the OS you’re working on, the toolchain you’re using and perhaps some pictures of the SBC in action?

[adel314]

On 7/26/2020 at 2:31 AM, retroclouds said:

Mind sharing some details on the OS you’re working on, the toolchain you’re using and perhaps some pictures of the SBC in action?

Sure (sorry for the late response) a link to an old page is here http://itech.net.au/tms9900/  however I am trying to move most of the source now to Githun https://github.com/adel314?tab=repositories.   I am also currently finalising a Floating Point Package based on 48 bit floating point numbers from Math48 package by Anders Hejlsberg.

 

By the way, I am not sure if you are aware but a very powerful disassembler that has proved helpful in debugging is also on Github at https://github.com/jedimatt42/9900dis/tree/master/src/disassem

Edited January 6, 2021 by adel314