Cyprian Posted March 24, 2021 Share Posted March 24, 2021 is that timer assigned as VBL to LEVEL0 vector? Quote Link to comment Share on other sites More sharing options...
SCPCD Posted March 24, 2021 Share Posted March 24, 2021 (edited) Yes, all Jaguar CPU (ie 68000) interrupts goes to same vector. You need to read the INT1 register to know wich one throw the interrupt. Edited March 24, 2021 by SCPCD 1 Quote Link to comment Share on other sites More sharing options...
Cyprian Posted March 25, 2021 Author Share Posted March 25, 2021 ok, thanks. I wonder how exact in that matter VJ is. I observed that from time to time I lost VBL interrupt (screen blinks due to wrong OP list). Maybe VBL interrupt is overlapped (and cancelled?) by PIT's one? Quote Link to comment Share on other sites More sharing options...
Cyprian Posted March 27, 2021 Author Share Posted March 27, 2021 just for the record, VJ has a bug regarding timers interrupt. I've just checked and on the real Jag and my VBL and PIT interrupts are stable, in VJ - PIT overlaps/cancels VBL interrupt. Quote Link to comment Share on other sites More sharing options...
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