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While running a test to probe some other Maria property (for the MiSTer 7800 core work) I happened across what appears to be a Maria silicon bug.

 

It *seems* that if you to write to a Maria color register on the exact cycle it's fetching a byte from the scanline buffer for display, it shifts the displayed byte by one Maria clock. 

 

I've put together a demo with the effect. It's easiest to see with a composite display, since the vertical lines in the demo will change artifact color when shifted.

 

MariaBug.bas.a78

MariaBug.bas.bin

 

Kudos to @Kitrinx who had theories and suggestions that were key to nailing this down.

 

This is just another curiosity. It's not particularly useful, and in practise this isn't something you'd need to intentionally avoid either - you probably wouldn't notice it if you did trigger it. The demo makes the bug obvious by using composite artifacting *and* hitting the color register over and over for the entire visible display.
 

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