TIA instruction clock execution

[Dr Pinball]

Hi

I am writing my first code for the 2600 and read about the clock delays associated with certain writes to the TIA. I was wondering how the TIA handles the following situation:

TIA runs at a clock speed 3X the 6507 - so for every 3 clocks the TIA acts on, 6507 executes once

The 6507 performs a write to a TIA register - the address / chip enable / data lines are set by the 6507

The TIA will then execute 3X before the 6507 executes again

 

Does this mean that the TIA will perform the same register write 3X and hence delay the action of the register write? The address / chip enable / data lines won't change over the 3X clock cycles as they are asserted by the CPU, so I'm thinking the TIA sees the same input on its pins for 3 clock cycles and hence does the same write for 3 clock cycles?

 

So as an example, if I performed a RESBL would that actually only ever work to a 3 pixel granularity because the TIA would see the RESBL for 3 clock cycles?

 

[JetSetIlly]

We can say that a ball reset is only ever *triggered* at a granularity of three TIA cycles. However, there is a delay *after the trigger* before the ball reset actually takes place. This is caused by the TIA itself and has nothing to do with the CPU. The length of this further delay varies but in most instances it is 5 TIA cycles.

 

In practical terms, with careful programming, the effects of RESBL (ie. where the ball is drawn) can be seen at any color-clock (pixel) on the screen.

 

I hope this helps.

Edited April 20, 2021 by JetSetIlly