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Questions about TMS9985 & TMS9995


Ursus

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Then we have the p-code card, which in addition to having 12 K ROM (in the DSR space, >4000 - >5FFF, where the top 4 K is paged by CRU bit >1F80) also has 8 GROMS. These all have 6 K memory, but the GROM base is also inside the DSR space. Thus it's right in the ROM space, but it's fully decoded, so it only occupies the words it really uses. The code in the ROM simply jump over these addresses.

Thus a total of 60 Kbytes of memory on that card.

 

Since this is completely separate from console GROM space, it's not limited to the five top GROMs here.

Edited by apersson850
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I found two threads in the forum that go well with the processors. I just overlooked them before I started.

 @mizapf: I think you talked about this thread. (#7)

In this thread @stuart has linked a slightly older thread (#20). A very interesting text.

 

 

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On 5/19/2021 at 11:27 AM, apersson850 said:

Then we have the p-code card, which in addition to having 12 K ROM (in the DSR space, >4000 - >5FFF, where the top 4 K is paged by CRU bit >1F80) also has 8 GROMS. These all have 6 K memory, but the GROM base is also inside the DSR space. Thus it's right in the ROM space, but it's fully decoded, so it only occupies the words it really uses. The code in the ROM simply jump over these addresses.

Thus a total of 60 Kbytes of memory on that card.

It seems that TI had plans to replace GPL with p-code...  P-code was widely used on 8-bit systems, for example there were very good Basic and Pascal  compilers into p-code.

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On 5/21/2021 at 3:16 AM, vol said:

It seems that TI had plans to replace GPL with p-code...  P-code was widely used on 8-bit systems, for example there were very good Basic and Pascal  compilers into p-code.

I wouldn't quite say they were trying to replace GPL here. TI at the time wanted all of their computer systems to be compatible with the p-System, as they saw it as the OS of the future. Look at the 99/8. It had a massive GPL subsystem running Extended BASIC 2 and a similarly massive subsystem running the p-System. Each had different user use-cases and widening the market, making both viable for their future development.

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9 hours ago, apersson850 said:

It has been mentioned that they at least considered making a microcontroller which executed GPL directly.

And it might even be a fun project to code one for an FPGA now. . .GPL would run a lot faster in a system like that.

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Yes, obviously. I've not studied the GPL interpreter in any kind of detail. But the p-code interpreter needs 6-7 instructions to figure out what to do. If the job then can be done with one instruction, it's 7-8 instructions instead of one. Like adding what's on top of stack with the second word on the stack, leaving the result on the stack, can be accomplished with the A *SP+,*SP instruction on the TMS 9900. For more complex instructions, the overhead is of course less, relatively spoken.

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  • 1 year later...
On 5/17/2021 at 2:24 PM, Ksarul said:

That would be in the 12K of ROM @RXB mentioned but didn't identify precisely. One other note for those unfamiliar with the TI: the GROM chips are not part of the system memory map as defined by most other computers, they are in addition to the regular memory and do not overlay any of the other memory spaces.

Following back up with a tech question.

 

GROMs don't really fit in the system memory map, but they technically take up some slots in >9800 to >9FFF, correct?

 

If I remember correctly, >9800 to >983C are decoded, so "review module library" will return sets of 5 GROMs (30K) in:

  1. >9800
  2. >9804
  3. >9808
  4. >980C
  5. >9810
  6. >9814
  7. >9818
  8. >981C
  9. >9820
  10. >9824
  11. >9828
  12. >982C
  13. >9830
  14. >9834
  15. >9838
  16. >983C

I played around with this a little bit with my HSGPL.  Quite a few carts can run in the non >9800 space, but some seem to be hard wired to expect >9800.  Also, using the 30K of GROM space into the other 15 slots still keeps the same >6000->7FFF ROM space, so if you have a ROM cart, you're limited to using just one with a bunch of GROM only carts.

 

Question 1 - So that means that >983E to >9BFF are really not "used", right?  So, ~962 bytes of "empty" memory map, or close to 1K.

 

>9C00 to >9C02 are "write data" and "write address".  

 

Question 2 - What about >9C04 to >9FFF, since that's another 1020 bytes in the memory map?  Do any of those addresses past >9C02 pair with the 16 aforementioned banks to denote that they're reading and writing to GRAM banks that might be in spaces 2-16 above?

 

There seem to be a lot of spaces that might have been creatively used in the >8000->9FFF space but they probably weren't worth adding as RAM due to the small amount of RAM that could be added and the odd sizes in the memory map.

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Your comments match my own investigations into that aspect of things, particularly the observation that things don't work well unless all bases get all address updates. I had to look at it both for Classic99 and the *berGROM ;)

 

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On 7/19/2022 at 2:17 AM, Willsy said:

 

That is very off-topic, and not true. 

 

 

Here are the past threads, covering this issue in detail.  

 

The final thread contains Bob Greenberg's documentation for TI. It describes a BASIC for TI, one which could NEVER ever ever run on the Home Computer.

 

 

Klaus Lukaschek @kl99 interviewed Herman Schuurman:

 

Quote

Q) Do you know how much Microsoft or Bill Gates was involved in the TI Basic / System Rom of the 99/4?

 

Microsoft was not involved with the 99/4 development.  They (in the form of Bob Greenberg) were contracted to develop BASIC for the SR-70 (which is also sometimes referred to as the 99/7), but the BASIC for the 99/4 was developed in-house.

 

 

 

@hloberg made an attempt to get Wikipedia changed.

 

 

A thread from 2017. 

 

 

 

 

We have more evidence each year.  @Toucan did the amazing job of scanning the C. B. Wilson papers, which ought to definitively settle the issue.

There are 2 documents:

 

 

 

 

 

Those two documents were posted here:

 

 

 

 

From that Greenberg document, @Ksarul concluded that it was a very different BASIC that Greenberg consulted on--not the Home Computer TI BASIC. 

 

A few details show that this BASIC is not ever going to run on the Home Computer:

 

(pages 2-9)

  • Input lines are 80 characters and leading spaces are preserved.
  • Tokens are negative bytes (128-255)
  • The interpreter is written in assembly.
  • The interpreter uses multiple workspaces (4A has only GPLWS at 83E0 and 83C0). R15 upper byte is the zero constant. 
  • It uses R10 as the downward-growing stack pointer (standard in other TI software).  
  • It uses XOPs -- there are no XOPs defined for use in the 4A.   (PUSH, PUSHF, PUSHI.  And macros FPUSH, BPUSH.)

 

If only the rumor-spreading folks (Greenberg included) could spend some time with this document, it might jog their memories enough to correct the record. 

 

  

 

 

 

Another fascinating discovery was the internal standardization of BASIC syntax (the first document).

 

 

 

Here is @kl99's evaluation of that:

 

 

 

 

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A few details show that this BASIC is not ever going to run on the Home Computer:

 

(pages 2-9)

  • Input lines are 80 characters and leading spaces are preserved.
  • Tokens are negative bytes (128-255)
  • The interpreter is written in assembly.
  • The interpreter uses multiple workspaces (4A has only GPLWS at 83E0 and 83C0). R15 upper byte is the zero constant. 
  • It uses R10 as the downward-growing stack pointer (standard in other TI software).  
  • It uses XOPs -- there are no XOPs defined for use in the 4A.   (PUSH, PUSHF, PUSHI.  And macros FPUSH, BPUSH.)

 

a though, I wonder if for a very, very brief time TI was thinking of releasing something along the lines of the TRS-80 model 1 that was more of scale down of their mini-frames?

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1 hour ago, hloberg said:

a though, I wonder if for a very, very brief time TI was thinking of releasing something along the lines of the TRS-80 model 1 that was more of scale down of their mini-frames?

The DS990-1 was a 64K desktop microcomputer using a TMS9900. It is in this 1979 catalog.   (The DS990-2 was a bigger minicomputer related to the 990/5.)  It shares operating systems with the 990 minicomputers.

 

 

The thread for DS990-1 is here.  I have parts of one.   Others have whole machines, but getting operating systems onto them is a problem. 

 

My DS990 has a 64K DRAM card. The cpu board  has a TMS9981, which has only a 16K address reach.  See 9900 Family Systems Design page 8-56 for the data sheet. 

 

 

 

 

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@Ksarul makes a great point in this thread: 

"After reading thrugh this, it becomes quite obvious that this BASIC was NOT for a Dimension 4 or a TI-99/4. It expected an 80-column, Model 911 VDT, had numerous hooks that would have connected to TI's TX operating system (to include all 15 XOPS), and it was expecting a full 64K of system memory space in the form of RAM. All of this tells me that the two BASIC specification documents go together though, as the first document posted provided the required framework for TI BASIC on all machines, whereas this second document specified TI BASIC on some flavor of the TI-990. Since the first specification applied to anything developed at TI using the BASIC language and enforced high-level compatibility, the fact that folks conflated the Microsoft Assembler development of BASIC for a professional system (a TI-990) with the internal work on the GPL-based BASIC in the Dimension X/99/4 systems is quite understandable. It is even likely that there were instances where Mr. Greenberg talked to the consumer team to iron out potential differences between the two implementations, all in the effort of maintaining the enforced conformity between system implementations. That would also explain the recollections of having seen him once or twice during the development process, as he wouldn't have been tied to that team, but he would have had to coordinate some specifics of what he was doing on the other side (the 990 side) with them."

 

 

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On 7/20/2022 at 7:20 PM, FarmerPotato said:

The DS990-1 was a 64K desktop microcomputer using a TMS9900. It is in this 1979 catalog.   (The DS990-2 was a bigger minicomputer related to the 990/5.)  It shares operating systems with the 990 minicomputers.

 

 

The thread for DS990-1 is here.  I have parts of one.   Others have whole machines, but getting operating systems onto them is a problem. 

 

My DS990 has a 64K DRAM card. The cpu board  has a TMS9981, which has only a 16K address reach.  See 9900 Family Systems Design page 8-56 for the data sheet. 

 

 

 

 

Hum, when I was in college the Georgia College system used TI-miniframes extensively. I learned to program on them and how to hack, I  mean, explore the systems, on them. don't ever remember a desktop microcomputer in use like the DS990-1 though. Georgia/Southern Tech used terminals while the lesser schools (Macon college ect..) used teletype machines. I wonder how rare they were?

Edited by hloberg
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On 5/24/2021 at 12:58 PM, Ksarul said:

And it might even be a fun project to code one for an FPGA now. . .GPL would run a lot faster in a system like that.

Integrating the Strange Cart logic into the console to replace the GPL interpreter?  Intriguing!

 

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