SynGraph and PBI devices - POKE $D1FE,3

[+DjayBee]

We recently found an alternative release of SynTrend with a slightly different SynGraph menu.

 

The very first line of its menu-program contains POKE 53758,3.

There are no other differences in any part of the code.

 

I hope that one of the hardware gurus out there can shed some light on this mistery:

 

Which PBI device shows which meaningful reaction by only writing 3 to its control register #1 (and nothing else)?

SynTrend (1983)(Synapse Software)(US)(Side B)(SynGraph)[a][BASIC].atx GMENU.bas

SynTrend (1983)(Synapse Software)(US)(Side B)(SynGraph)[a][BASIC][cr CSS].atr

Edited August 27, 2022 by DjayBee
cracked ATR added

[+DjayBee]

@kenames99 or @reifsnyderb with all your 1090 experience:

 

Do you have an idea which PBI device could have been addressed by only writing a 3 to $D1FE (and nothing else)?

🤞

[reifsnyderb]

9 minutes ago, DjayBee said:

@kenames99 or @reifsnyderb with all your 1090 experience:

 

Do you have an idea which PBI device could have been addressed by only writing a 3 to $D1FE (and nothing else)?

🤞

$D1FE would be for banking a 1090 RAM card.  Writing a 3 to that address would select bank 3.  See the attached instructions on page 9.

 

1090_64K_ram_card_owners_guide.pdf

[+x=usr(1536)]

Interesting.  I wonder how this would behave with a U1MB or similar hanging off of the PBI.

[reifsnyderb]

19 minutes ago, x=usr(1536) said:

Interesting.  I wonder how this would behave with a U1MB or similar hanging off of the PBI.

$D1FE was reserved, by Atari, only for banking RAM installed on a 1090.  I didn't think any software was written to support it until I saw this post.  It appears some software companies were planning to support the 1090.  

 

I don't recall anything showing the U1MB supporting $D1FE.  There is some information about the U1MB in the Altirra Hardware Reference Manual.

Edited September 5, 2022 by reifsnyderb

[+x=usr(1536)]

11 minutes ago, reifsnyderb said:

$D1FE was reserved, by Atari, only for banking RAM installed on a 1090.  I didn't think any software was written to support it until I saw this post.  It appears some software companies were planning to support the 1090. 

Which gels with my understanding as well.  I was aware that they had spoken with some third parties regarding the 1090 and its RAM and 80-column cards, but was always under the impression that the 1090 was cancelled so soon after that that there was no software supporting it.  This is a really awesome finding.

15 minutes ago, reifsnyderb said:

I don't recall anything showing the U1MB supporting $D1FE.  There is some information about the U1MB in the Altirra Hardware Reference Manual.

Got it.  Appreciate the pointer, and will check it out.

[Rybags]

I wasn't aware of this scheme until reading it here.

U1Meg only supports PORTB addressing for RAM, I believe it has extra unique control registers for it's flash-Rom.

I would guess this piece of software might be unique in supporting this type of banking unless there's some Dos out there that also does.

 

It seems a bit strange that this method was chosen though it likely predates the 130XE by a good margin and at the time 2 spare PORTB bits had been reserved for 1200XL status LEDs.

The 1090 I imagine would need near the exact same circuitry do decode $D1FE vs $D301 - actually possible more since you're decoding an exact address where with PIA you just take the D1 page as a chip-select then use the bottom 2 bits for the register address (PBI Ram upgrades such as 320XL have to monitor and shadow PIA functions by capturing activity to it's address range)

Edited September 5, 2022 by Rybags

[flashjazzcat]

U1MB should not interfere with this, since the PBI BIOS happily co-exists with other PBI devices on different bus IDs.

[+DjayBee]

19 hours ago, reifsnyderb said:

$D1FE would be for banking a 1090 RAM card.  Writing a 3 to that address would select bank 3.  See the attached instructions on page 9.

 

Thanks, I misread phaeron's HW Refguide and thought that you need to additionally set bit 7 for ENabling the extended RAM.

 

The code still does not make sense because enabling page 4 of the extended RAM is the only action on this register done by SynGraph.

So from my understanding, it would only use the extended page instead of the "home" page inside the Atari.

 

Perhaps you can run one of the disk images above on your 1090-equipped Atari and see if "something" happens.

[reifsnyderb]

2 hours ago, DjayBee said:

Thanks, I misread phaeron's HW Refguide and thought that you need to additionally set bit 7 for ENabling the extended RAM.

 

The code still does not make sense because enabling page 4 of the extended RAM is the only action on this register done by SynGraph.

So from my understanding, it would only use the extended page instead of the "home" page inside the Atari.

 

Perhaps you can run one of the disk images above on your 1090-equipped Atari and see if "something" happens.

If there is only one change made to $D1FE then it would only use one bank.  This sounds odd because if it uses a bank it should also have code to change to other banks or even de-select the bank.

 

My 320k 1090 card shadows $D301.  I didn't see any reason to use $D1FE as I doubted anything was ever written to take advantage of it.  

[phaeron]

There's an issue with idea of this POKE being for the 1090 RAM card: the BASIC program extends above $4000. According to the 1090 RAM docs, a card installed in Bank Select mode starts enabled in bank 0. I tried emulating the RAM card and the result was that the BASIC program crashed on startup after banking out the latter half of itself.

 

Shadowing the PIA for a PORTB-style mechanism requires emulating three registers (DDRB/ORB/CRB). Otherwise, an old cart that just clears the $D3xx page ends up banking out the OS ROM and turning on extended memory, when it should instead do the opposite.

 

[reifsnyderb]

1 hour ago, phaeron said:

There's an issue with idea of this POKE being for the 1090 RAM card: the BASIC program extends above $4000. According to the 1090 RAM docs, a card installed in Bank Select mode starts enabled in bank 0. I tried emulating the RAM card and the result was that the BASIC program crashed on startup after banking out the latter half of itself.

Good observation.  What else would set $D1FE?

1 hour ago, phaeron said:

Shadowing the PIA for a PORTB-style mechanism requires emulating three registers (DDRB/ORB/CRB). Otherwise, an old cart that just clears the $D3xx page ends up banking out the OS ROM and turning on extended memory, when it should instead do the opposite.

What are DDRB/ORB/CRB?  I checked Mapping the Atari and didn't find anything.

 

Anything that clears the $D3xx page on an XL/XE is asking for trouble.

[Rybags]

DDR is Data Direction register.

You can't just assume a write to PORTB will change memory banking.  The relevant bit has to be dedicated as an output first.

OS default is inputs on PORTA and outputs on PORTB.

But if you change a PORTB bit to input I believe the banking state controlled by that bit will remain as it was regardless of what you do while it remains as an input.

 

CRB would be the control register which sets whether the PORTB address is in data direction or normal mode.

[reifsnyderb]

10 minutes ago, Rybags said:

DDR is Data Direction register.

You can't just assume a write to PORTB will change memory banking.  The relevant bit has to be dedicated as an output first.

OS default is inputs on PORTA and outputs on PORTB.

But if you change a PORTB bit to input I believe the banking state controlled by that bit will remain as it was regardless of what you do while it remains as an input.

 

CRB would be the control register which sets whether the PORTB address is in data direction or normal mode.

How or why would PORTB be an input on an XL?

 

Going back the @phaeron's statement about an old cartridge clearing out $D3xx:  If such a cartridge were to be used on an XL I don't see how it wouldn't crash the system anyhow.

 

 

[ijor]

I suspect this might have nothing to do with the 1090. It might have been some custom device used for developing or debugging. Who knows.

[phaeron]

2 hours ago, reifsnyderb said:

How or why would PORTB be an input on an XL?

This is actually extremely common: it's how the system powers up.

 

The defined post-reset state for the PIA is all registers set to $00. This sets both port A and port B to all inputs. The reason this works is that there are pull-ups on the port B control lines that are used for banking to ensure that the connected signal lines are pulled up to a 1 when the port lines are set to input. This enforces OS ROM enabled and BASIC + Self-Test disabled.

Normally, the XL/XE OS reconfigures port B to all high outputs and then leaves output register B (ORB) visible in PORTB, which leads to the standard configuration where PORTB writes change the banking configuration. However, this isn't required, and the all-input mode is also needed for compatibility when a program clears the $D3xx page. Doing an ascending loop to clear $D300-D3FF results in a write to PBCTL switching PORTB to data direction register B (DDRB), followed by a subsequent write to PORTB setting all inputs. Output register B (ORB) is not necessarily cleared, but doesn't matter in input mode. This case is similar to the power-up configuration, and works equally well on an XL/XE machine as on an 800.

 

2 hours ago, reifsnyderb said:

Anything that clears the $D3xx page on an XL/XE is asking for trouble.

It's more common than you think. Atari wouldn't have gotten very far selling a new computer model that couldn't run Star Raiders.

[reifsnyderb]

28 minutes ago, phaeron said:

This is actually extremely common: it's how the system powers up.

 

The defined post-reset state for the PIA is all registers set to $00. This sets both port A and port B to all inputs. The reason this works is that there are pull-ups on the port B control lines that are used for banking to ensure that the connected signal lines are pulled up to a 1 when the port lines are set to input. This enforces OS ROM enabled and BASIC + Self-Test disabled.

Normally, the XL/XE OS reconfigures port B to all high outputs and then leaves output register B (ORB) visible in PORTB, which leads to the standard configuration where PORTB writes change the banking configuration. However, this isn't required, and the all-input mode is also needed for compatibility when a program clears the $D3xx page. Doing an ascending loop to clear $D300-D3FF results in a write to PBCTL switching PORTB to data direction register B (DDRB), followed by a subsequent write to PORTB setting all inputs. Output register B (ORB) is not necessarily cleared, but doesn't matter in input mode. This case is similar to the power-up configuration, and works equally well on an XL/XE machine as on an 800.

 

It's more common than you think. Atari wouldn't have gotten very far selling a new computer model that couldn't run Star Raiders.

That all makes sense now.  Thanks for clearing it up!

[Rybags]

Earlier when I mentioned U1Meg not supporting the $D1FE banking control  - the meaning there being that it doesn't bank it's own memory using that address.

I didn't mean to put across the idea that a U1Meg would stop a 1090 using it's own Ram expansions from working (though it might, I don't have a 1090 or peripherals so have no experience there).

In theory doing banking in this way would probably be fairly trivial to add as a feature to a production memory upgrade but you'd sort of wonder why bother?