+FarmerPotato Posted September 26, 2022 Share Posted September 26, 2022 This is pure theory. I I though about it during my commute. Suppose you used the segmented code/data memory model of the 99000. Program segment (PSEG) is in distinct address space from Data segment. Loaded into different blocks of RAM. Which are selected by the BST bus status codes telling whether the 99000 is fetching code or data. I’m stuck thinking through how a branch table would appear. Am I right that this model breaks code like: PSEG * directive: program segment DSRLNK DATA DSRWS,DSR0 DSR0 MOV *R14+,R1 BIND JMPTBL,R1 JMPTBL DATA 0,0,0,0,DSR8,DSR10 START LWPI MYWS BLWP @DSRLNK DATA 8 DSEG * directive: data segment BSS DSRWS BSS MYWS END Does BLWP fetch vector with BST = IAQ? Does DSRLNK vector belong in program or data segment? *R14 would access data space, uhoh, not seeing the DATA 8 Dunno how JMPTBL is linked/loaded Is the Tagged Object Loader, as we know it, capable of resolving the JMPTBL addresses? (Supposing it had been loading a PSEG and DSEG into separate pages in this model.) should JMPTBL be in program or data segment? Does BIND access JMPTBL as a IOP (immediate operands) or general memory? (Wrong segment!) On the other hand, Should JMPTBL be in program, or data segment using REF/DEF? (Is this a use case for SREF?) Do like this instead of BIND? (Branch indirect) MOV *R14+,R1 MOV @JMPTBL(R1),R2 B *R2 And put JMPTBL in the data segment? Thoroughly confused. Again, this is all theoretical, I’m not going to implement this. 1 Quote Link to comment Share on other sites More sharing options...
Join the conversation
You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.