Accessing U1M RAM Banks

[TGB1718]

I'm trying to access the additional RAM Banks in my U1M and Incognito, however I can't seem to find any details

on how to do this, anyone have a simple  example or description on how to achieve this.

 

I've looked at the Altirra hardware and U1M hardware manuals, but nothing jumps out.

 

One of the manuals says to look at Axlon extended memory description, but again I've googled

and searched the forum, but nothing useful appears.

[AtariGeezer]

 

[TGB1718]

thanks for the link @AtariGeezer there's a bit of info there, but unfortunately still no doc's or examples 

[AtariGeezer]

Check the docs at the bottom of this post:

 

[TGB1718]

Once again thanks, I did see that, but my browser refuses to open the link, says "the website sent back unusual and incorrect credentials."

So I can't see that document

 

SOrry, I did get the text file, reading that now

 

Edited October 7, 2022 by TGB1718

[phaeron]

U1MB doesn't have any special way of accessing extended memory, it's just regular PORTB banking in whatever extended memory mode that is enabled.

 

[TGB1718]

@phaeron thanks for the reply, I currently have mine set as a 130XE, 1088K RAMBO but with that configuration

only the standard 130XE RAM is available using bank switching with PORTB.

I'm quite happy with that and have used that banking scheme in a few programs.

 

I don't see how to access the extra RAM that's available, most documents I've

read seen to indicate using address $CFFF (preferred address) as a bank selector, but this location does nothing,

I'm sure it's a simple process, but nothing I've read gives any clues/examples on how to make this work.

 

I've even tried disassembling a couple of RAM testers to see how it's done, but no luck there either.

[Rybags]

All U1Meg Ram schemes should be via PORTB.

 

Note you have differences when you get into the larger sizes such as seperate Antic access not being available and dual usage of Self-Test and Basic select bits since 6 bits are needed for bank select out of the 8 and we have extended enabled and OS being used by 2 of them.

 

I believe there are extra U1Meg specific registers that can be made visible that can control things such as which Rom images appear and what Ram banking scheme is active - documentation for that is around somewhere.

[flashjazzcat]

2 hours ago, Rybags said:

I believe there are extra U1Meg specific registers that can be made visible that can control things such as which Rom images appear and what Ram banking scheme is active - documentation for that is around somewhere.

Only available when the configuration is unlocked with RESET (i.e. from the firmware setup tool). No external access is possible.

[TGB1718]

Thanks for all the replies, I did find a document that explained the bank switching using port B, making use of the

bits  4,5 & 6, this was for a 256K upgrade.

I tried this with 320K selected and it worked, I then realised for U1M to be accessed, some extra bits would still be

needed, using this assumption I guessed bit 7 could be used as there's no real need for the diagnostic ROM and

again if your not needing BASIC there's another bit available.

 

I tried using these bits and it seemed to function as I expected.

 

If in the original scheme for 256K the order of bits is 2,3,5,6 

in order to maintain compatibility with larger RAM sizes am I correct in assuming the order for U1M 2,3,5,6,1,7

 

One last question, is there something that tells you which banks SDX is using

 

I've attached the RAMBO document just in case anyone else want to have a look.

rambo_manual.pdf

[+DjayBee]

6 hours ago, TGB1718 said:

most documents I've read seen to indicate using address $CFFF (preferred address) as a bank selector, but this location does nothing

This is the banking register for Axlon's memory expansions in the 400/800 line.

 

32 minutes ago, TGB1718 said:

If in the original scheme for 256K the order of bits is 2,3,5,6 

in order to maintain compatibility with larger RAM sizes am I correct in assuming the order for U1M 2,3,5,6,1,7

Check phaeron's hardware reference guide. It shows (in chapter 2.7 I believe) the bits used by the various implementations of PORT-B memory expansions.

[TGB1718]

@DjayBee thanks, that confirms what I suspected, not sure how I missed that when I looked through it, although I really only

looked at the port B description.

 

It does list the "bits" used, but I don't think they are listed in priority, just in numerical order.

[TGB1718]

Answering my own questions now, just found a utility included with SDX that shows which banks

are in used by SDX and those that are free, really nice is that it shows you the PORTB values to 

access each bank, pity I didn't find this earlier, it explains what I was trying to discover

 

 

D7:\UTILS\SYSUTIL>MEMINFO

Ext memory information:

HWRegister: PORTB
Bank count: 64 (1024 KB)
Free banks: 61 (976 KB)

List of free banks (index=regvalue):

4=$E3   5=$E7   6=$EB   7=$EF
8=$E1   9=$E5  10=$E9  11=$ED
12=$C3  13=$C7  14=$CB  15=$CF
16=$C1  17=$C5  18=$C9  19=$CD
20=$A3  21=$A7  22=$AB  23=$AF
24=$A1  25=$A5  26=$A9  27=$AD
28=$83  29=$87  30=$8B  31=$8F
32=$81  33=$85  34=$89  35=$8D
36=$63  37=$67  38=$6B  39=$6F
40=$61  41=$65  42=$69  43=$6D
44=$43  45=$47  46=$4B  47=$4F
48=$41  49=$45  50=$49  51=$4D
52=$23  53=$27  54=$2B  55=$2F

56=$21  57=$25  58=$29  59=$2D
60=$03  61=$07  62=$0B  63=$0F
64=$01

Occupied banks (index=regvalue):

65=$05  66=$09  67=$0D

 

[+CharlieChaplin]

XRAM 022 and many other XRAM testers will show you the used bits of your RAM upgraded Atari XL/XE computer.

 

[flashjazzcat]

Discern the size of extended PORTB RAM in software:

 

http://atariki.krap.pl/index.php/Obsługa_standardowego_rozszerzenia_pamięci_RAM

 

[phaeron]

There's no defined priority for U1MB extended memory banking bits because this order is invisible to most software. The assignment from banking bits to RAM address bits is only visible if there is some other way to alias extended memory and thus see the order. This happens with 256K expansions that alias main memory, and the U1MB BIOS can also see this by changing the extended memory mode. There is, however, no way for regular software to see this because there's no way for it to even notice if two banks are swapped, or to change the extended memory mode due to config lock.

 

The bank order produced by MEMINFO would be, at best, a convention established by SpartaDOS X; it isn't dictated by the hardware.

 

[TGB1718]

3 minutes ago, phaeron said:

The bank order produced by MEMINFO would be, at best, a convention established by SpartaDOS X; it isn't dictated by the hardware.

I sort of suspected something like that, but as long as you access banks in a consistent way within a program,

I suppose it doesn't really matter which bank it is. Just avoid the ones SDX has used.