Atari 800 Personality Board -- RAMROM 2022

[ivop]

Here's where I got this information:

 

 

It re-uses the OS ROM and apparently only intercepts the CPU interrupt vectors and let the rest through to the normal ROM.

 

Side note: we are still looking for newer ROMDOS ROMs and bootdisks

Edited October 27, 2022 by ivop
spelling

[reifsnyderb]

49 minutes ago, ivop said:

Here's where I got this information:

 

 

It re-uses the OS ROM and apparently only intercepts the CPU interrupt vectors and let the rest through to the normal ROM.

 

Side note: we are still looking for newer ROMDOS ROMs and bootdisks

It looks like my card will probably work.  I found no evidence of any other connections.

[ivop]

41 minutes ago, reifsnyderb said:

It looks like my card will probably work.  I found no evidence of any other connections.

But then how is it possible to intercept SELECT/RESET if it cannot change the unpatched OS-B that is located at $D800-$FFFF ?

 

[tep392]

2 hours ago, reifsnyderb said:

Hopefully, @tep392 will post about this, then.  I never saw anything about it in any documentation, posts, etc., and there was no sign on my Newell board that there was anything I was missing or any socket to add another feature.

It’s done with the address decoding on the ramrod. If you have replicated it, then it should work fine. Reads from FFF8-FFFF will enable the chip at C000 instead of the OS Chip at F000. It’s rather simple and clever. 

[ivop]

7 minutes ago, tep392 said:

It’s done with the address decoding on the ramrod.

So it's not an extra daughter board that sits between the OS socket and the OS ROM as I thought you said before?

 

Edit:

 

Quote

Reads from FFF8-FFFF will enable the chip at C000 instead of the OS Chip at F000.

How does it know if there is a chip there?

Edited October 27, 2022 by ivop

[reifsnyderb]

10 minutes ago, tep392 said:

It’s done with the address decoding on the ramrod. If you have replicated it, then it should work fine. Reads from FFF8-FFFF will enable the chip at C000 instead of the OS Chip at F000. It’s rather simple and clever. 

Do you have the DIP switch settings on the RamRod to make this possible?  I am looking at the schematic of the RamRod and not finding any way to send any chip enable from any Fxxx address to the chip at C000.

Edited October 27, 2022 by reifsnyderb

[tep392]

2 hours ago, ivop said:

So it's not an extra daughter board that sits between the OS socket and the OS ROM as I thought you said before?

 

Edit:

 

How does it know if there is a chip there?

 

2 hours ago, reifsnyderb said:

Do you have the DIP switch settings on the RamRod to make this possible?  I am looking at the schematic of the RamRod and not finding any way to send any chip enable from any Fxxx address to the chip at C000.

I assumed the Ramrod did it the same way.  Ramrod is supposed to work with Atari ROM, so it must be able to change the reset vector is some manner.  Or maybe it doesn't. The daughter board version sit's in the F000 slot, so it can decided if C000 or F000 chips are selected. It has an 8 input NAND gate plus some other gates that are part of the address decoding logic.  The daughter board also allows a switch to be added to disable the reset vector trick or disable omnimon completely.  

 

I'll try putting the Atari ROMS in my ramrod and see it the Omnimon still works in the same manner.  

 

Edit:

I put the Atari ROMS in and now option/reset and select/reset no longer work.  So the Ramrod doesn't work the same as the daughter board.  A patch to the reset vectors at $FFFA-FFFD is required.  The OSN ROMS already have this.  I then found these installation instructions which explain it.

 

OMNIMON ! INSTALLATION INSTRUCTIONS

NOTE : If you purchased OMNIMON! installed in the OS ignore this piggy-back board, sheet. Instead, refer to the installation instructions provided with the board.

 

The OMNIMON! program comes in a 2732 compatible ROM. This can be ln sPecial hardware such as RAMROD MMOS by NEWELL INDUSTRIES which accepts a 2732 in the $C000 block of memory. Follow the instructions provided with this hardware for installation of the chip.

 

To make sure the installation is correct up to this point, power up he computer. If everything appears to be normal, try entering OMNIMON 1 from BASIC with a • X=USR(49152 )
 If it fails this test then double check tne installation of the chip. If this works properly then proceed with the next paragraph.

 

For proper operation of OMNIMON! the following locations should be changed m the OS (assuming your OS is in EPROMS):
$FFFA-$FFFD - $CE, $CF , $F5 , $CF

 

This allows the SELECT and OPTION keys to work in conjunction with SYSTEM RESET for entering OMNIMON! • If If the OS chips were provided with the RAMROD then these changes have already been made. If you do not make this mod then it is possible to enter OMNIMON! from BASIC with 1 X=USR( 49152) However, this is less convenient than the SELECT/RESET or OPTION/RESET technigue, which interrupts any program which may be running.

 

If the system fails to power up after you have made these mods then one mods were not done correctly. When done correctly the system should power up normally and you should be able to enter OMNIMON* with
SELECT/RESET or OPTION/RESET. Installation of OMNIMON! is‘now complete.

[ivop]

Thank you for testing and confirming my suspicion So @reifsnyderb's new board would need a patched OS ROM to utilize the SELECT/RESET technique, or it needs to be changed to map the vectors to CFFA-CFFF if a 4kB ROM is installed there. I suppose automatic detection is difficult/impossible, so that'll need a dipswitch or jumper.

Edited October 28, 2022 by ivop

[tep392]

53 minutes ago, ivop said:

Thank you for testing and confirming my suspicion So @reifsnyderb's new board would need a patched OS ROM to utilize the SELECT/RESET technique, or it needs to be changed to map the vectors to CFFA-CFFF if a 4kB ROM is installed there. I suppose automatic detection is difficult/impossible, so that'll need a dipswitch or jumper.

Newell offered an optional switch for disabling Omnimon (daughter board version) because there was the possibility of software checking for it's presence and not running.  I don't know how much of this actually went on back in the day, so it may or may not be an issue for the average 800 user today.  I think a dipswitch to disable the ROM at C000 and any reset vector modification scheme would probably be good to include, just in case.  If it's something that is needed more frequently, then maybe a switch located at the top edge of the card to make it possible to switch off without removing the card. I hot glued the switch to the top of my OS board for my daughter card Omnimon so I can easily access it by lifting the cover.  I have no interest in drilling holes and mounting switches on my relatively pristine machine.

[reifsnyderb]

17 hours ago, tep392 said:

For proper operation of OMNIMON! the following locations should be changed m the OS (assuming your OS is in EPROMS):
$FFFA-$FFFD - $CE, $CF , $F5 , $CF

This would be easy to do and store on the flash chip.

[reifsnyderb]

1 hour ago, tep392 said:

Newell offered an optional switch for disabling Omnimon (daughter board version) because there was the possibility of software checking for it's presence and not running.  I don't know how much of this actually went on back in the day, so it may or may not be an issue for the average 800 user today.  I think a dipswitch to disable the ROM at C000 and any reset vector modification scheme would probably be good to include, just in case.  If it's something that is needed more frequently, then maybe a switch located at the top edge of the card to make it possible to switch off without removing the card. I hot glued the switch to the top of my OS board for my daughter card Omnimon so I can easily access it by lifting the cover.  I have no interest in drilling holes and mounting switches on my relatively pristine machine.

There is a DIP switch on the board that can disabled the ROM at $C000.  However, there is no way on the board to disable the reset vector modification.

 

My suggestion would be to have a bank that has a patched OS for the reset vector modification as my board has 4 banks available for ROMs.  So, you could have a bank available that is patched for Omnimon and one that is stock.  On my board, there is a set of header pins to permit an external switch to be added.

[ivop]

1 hour ago, tep392 said:

because there was the possibility of software checking for it's presence and not running.

This was done in some demos in the late eighties and early nineties. Check if the OS is a stock OS. Some checked only one signature (XL OS Rev. 2), some checked more. If it didn't match, it wouldn't run. The Big Demo is an example.

 

41 minutes ago, reifsnyderb said:

So, you could have a bank available that is patched for Omnimon and one that is stock.

Agreed. In this day of age, it's a lot easier to use a patched OS.

Edited October 28, 2022 by ivop

[+David_P]

As I recall, at least some early EA releases checked for OMNIMON and refused to boot if it was detected.  The issue was noted in the ANALOG review of (I think) MULE and Archon.

[+Larry]

As a prospective user, I'm most interested that the board allows use of Omnimon, Omniview, Romdos, and OSB to operate normally, so that would use all 4 of flash slots.  I'm perfectly happy with a patched of OS.  It sounds like your board is good to go, unless I'm missing something.

[reifsnyderb]

46 minutes ago, Larry said:

As a prospective user, I'm most interested that the board allows use of Omnimon, Omniview, Romdos, and OSB to operate normally, so that would use all 4 of flash slots.  I'm perfectly happy with a patched of OS.  It sounds like your board is good to go, unless I'm missing something.

Hello,

 

I think the board is ready.  I just need to take some time to load it up with the OS's and double-check it's functionality.

 

Best Regards,

 

Brian

 

[reifsnyderb]

I spent some timing building up a flash chip image for this board.  Here's some information on where I am at:

 

There are 4 banks that can be selected via DIP switch 1/4 and 1/5 as follows:

 

Bank 1:  Switches 0-0

Location:  0000-3FFF

 

OS Rev B loaded at 1800 with the stock floating point pack.

 

 

Bank 2:  Switches 1-0

Location:  4000-7FFF

 

OS Rev B loaded at 6000.  Fast chip is loaded at 5800.

 

 

Bank 3:  Switches 0-1

Location:  8000-BFFF

 

OS Rev B loaded at A000.  Fast Chip is loaded at 9800.  Omnimon is loaded at 8000.

The OS is patched as follows and as per Ominmon instructions:

BFFA-BFFD:  CE, CF, F5, CF   (originally 91, E7, 25, F1)

This allows Option/Reset to start Omnimon.  I tested this and it works.

 

Bank 4:  Switches 1-1

Location C000-FFFF

 

OS Rev B loaded at E000.  Fast chip loaded at D800.  Omniview800 loaded at C000.

Omniview will load and run but for some reason I can't change the colors to white letters on a blue screen.

 

 

 

Banks 2, 3, and 4 have also been patched as follows and as per the Newell RAMROD instructions:

 

E869:  06 changed to 03

FFE3:  03 changed to 01

FFEC:  30 changed to 10

FCD9:  7F changed to 3F

F174:  02 changed to 00

 

These changes reduced the key repeat interval, shortened the "bell", and set the left margin from 2 to 0.  They key repeat interval reduction is awesome.   🙂

 

Note that the bank location is re-mapped by the RAMROM board to be from C000-FFFF when a bank is set.

 

Also, Sysinfo V. 2.24 shows the differences between the stock floating point package and Fast chip as follows.  Stock numbers are the lower numbers, of course.

 

Addition:  99 to 174

Subtraction:  99 to 170

Multiplication:  99 to 261

Division:  99 to 272

A stock 800XL is listed as being 100.

 

 

 

 

 

 

 

[reifsnyderb]

Curiosity got the best of me so I loaded bank 2 with the Alitirra OS and benchmarked the floating point package as follows:

Addition:  159

Subtraction:  156

Multiplication:  305

Division:  160

 

Unfortunately, only multiplication beat out the Fast Chip.

[reifsnyderb]

@Larry and @bob1200xl

 

Since I am adding the fast SIO patch to bank 2, I figured I'd also upgrade the Fast Chip to the latest Fast Math v F on the 3 banks that previously had Fast Chip.  Here's the new ROM image that works on the RAMROM 2022 board.

 

RAMROM_2022_Stage_7_Omnimon_Omniview_patches.bin

 

While I don't have the correct drives to test the fast SIO patch, the banks appear to work fine.

Edited February 9, 2023 by reifsnyderb

[ClausB]

You're welcome to put this fast multiplier into one of the OS ROMs if you like:

 

https://forums.atariage.com/topic/124761-fast-math-rom/?do=findComment&comment=1516639

 

[reifsnyderb]

30 minutes ago, ClausB said:

You're welcome to put this fast multiplier into one of the OS ROMs if you like:

 

https://forums.atariage.com/topic/124761-fast-math-rom/?do=findComment&comment=1516639

 

Thanks!  How's it benchmark with SysInfo?

[ClausB]

46 minutes ago, reifsnyderb said:

Thanks!  How's it benchmark with SysInfo?

I don't know.

[+Larry]

On 2/8/2023 at 9:22 PM, reifsnyderb said:

@Larry and @bob1200xl

 

Since I am adding the fast SIO patch to bank 2, I figured I'd also upgrade the Fast Chip to the latest Fast Math v F on the 3 banks that previously had Fast Chip.  Here's the new ROM image that works on the RAMROM 2022 board.

 

RAMROM_2022_Stage_7_Omnimon_Omniview_patches.bin 128 kB · 3 downloads

 

While I don't have the correct drives to test the fast SIO patch, the banks appear to work fine.

I flashed a new rom for the Ramrom board, and the high-speed SIO appears to work perfectly.  I tested it with a 1050 Happy Drive and APE. Thanks again for Hias' work and Brian for his board and new file with the patch.

[ClausB]

On 2/9/2023 at 7:57 PM, reifsnyderb said:

Thanks!  How's it benchmark with SysInfo?

I tried running Sysinfo 2.24 but it still says 100. I'm guessing it disables the RAM based OS where my patch lives.

 

Edit: operator error. Sysinfo reports 297 for multiplication.

Edited February 16, 2023 by ClausB

[reifsnyderb]

Attached is an early instruction manual for the RAMROM 2022 board.  It still needs a lot of work.

 

RAMROM 2022 Manual v0_10.pdf

[reifsnyderb]

I've added a jumper to send the clock signal (Phi2) out the RASTime line so as to have Phi2 on the left cartridge port.  This is designed to improve cartridge compatibility on Atari 800's that are using SRAM memory...which does not require RASTime.  The new board is now known as the RAMROM 2023.   🙂