Any1 want to hack on #FujiNet for Intellivision?

[doctorclu]

Hey IntelliNuts, it is good to see the interest in getting the FujiNet working on the Intellivision.  I use such a device on my Atari 800 and I will say, it makes BBSing great and file sharing awesome. 

 

Looks like this thread started after InTVNut or Joe Zbiciak was last on Atariage in 2021, however if you can get him involved in this project, I believe he could drive this home.   Found some contact info at the LTO Flash site as his mailbox may be full on Atariage.

 

Aside from the hardware and firmware experience of creating the LTO Flash, InTVNut also wrote the Intellivision Term Program that I prank called Atariage with from my Intellivision and ECS. 

 

He also once told me Lathe26 had confirmed that the UART on the ECS is bidirectional.  And recommended trying to call a BBS at 1200bps with just an ECS and it was theoretically doable.  So glad to see Lathe26 is on this discussion.

Edited June 6 by doctorclu

[tschak909]

1 hour ago, mr_me said:

Here's the Intellivision memory map.

http://spatula-city.org/~im14u2c/intv/jzintv-1.0-beta3/doc/programming/memory_map.txt

 

The Intellicart used some of those addresses marked reserved, although write only.

 

Would this be a device that passes through the cartridge port for other cartridges?

It potentially could, and I know that there are people who love their physical carts, but it doesn't have to, because it can load software from the network.

 

-Thom

[mr_me]

The Intellicart uses some adresses in the range 033 to 07F for hardware registers. Intellicart uses them as write only however. Does that that mean that range is not readable or just how the Intellicart was implemented. 

[tschak909]

I'm getting to the point where I need someone well versed with the hardware.

If we allocated two memory addresses, one for the status register, and one with a bi-directional data register, is there any additional consideration specific to the CP1600 that we'd have to do for this to work?

 

The reason I am asking, is that @jeffpiep is working through the first implementation of a bus based FujiNet, and because it's being done for the TRS-80 Color Computer, we're looking at an existing idea they've plumbed into their FPGA clone and all the emulators, the Becker Port:

 

 

The point is, that it's implemented using only two addresses, easy to decode.

 

-Thom

Edited June 8 by tschak909

[tschak909]

On 6/6/2024 at 9:17 AM, mr_me said:

The Intellicart uses some adresses in the range 033 to 07F for hardware registers. Intellicart uses them as write only however. Does that that mean that range is not readable or just how the Intellicart was implemented. 

Are the hardware registers 8 or 16-bits wide? 

[mr_me]

2 hours ago, tschak909 said:

Are the hardware registers 8 or 16-bits wide? 

I think the Intellicart registers are 8-bit but you can have registers up to 16-bit.

[timdu]

13 hours ago, tschak909 said:

I'm getting to the point where I need someone well versed with the hardware.

You are in need of Joe Zbiciak , AKA "INTVNUT" here on AA. Unfortunately, he has not been active in the Intellivision community at this time due to personal and professional commitments. We hope he will return someday. He is an "Intellivision Jedi "

 

have you viewed the documentation on his web site?

 

http://ltoflash.leftturnonly.info/

 

[mr_me]

13 hours ago, tschak909 said:

I'm getting to the point where I need someone well versed with the hardware.

If we allocated two memory addresses, one for the status register, and one with a bi-directional data register, is there any additional consideration specific to the CP1600 that we'd have to do for this to work?

 

The reason I am asking, is that @jeffpiep is working through the first implementation of a bus based FujiNet, and because it's being done for the TRS-80 Color Computer, we're looking at an existing idea they've plumbed into their FPGA clone and all the emulators, the Becker Port:

 

 

The point is, that it's implemented using only two addresses, easy to decode.

 

-Thom

The CP1600 bus is multiplexed between data and address. There are a couple of control signals setting the bus phase. Your registers would have to work with that. More information here.

http://spatula-city.org/~im14u2c/intv/tech/master.html