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Experiments with the Nabu

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I'm thinking about how it might be easiest to port MSX games.


A lot of stuff does seem to utilize the BIOS at least for an abstraction layer for the VDP and PSG. (Same chips; different port numbers.) So far as this is done, runtime patching won't be necessary, just an implementation of a subset of the MSX BIOS (although getting it loaded at 0x0000 instead of 0x0100 is going to be a trick - but Girl's Garden does the same relocation trick.) Stuff like the controllers, though, may need runtime patching.

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  • 2 months later...
  • 4 weeks later...

owo what's this?



I have found and disassembled the joystick routine, but can't understand it yet.  Ports DC and DD are the SG-1000 joystick ports.  I know how to read the Nabu ones (though it's a bit more esoteric and I might do so through a graft onto the IRQ handler).

0b01 3a 00 c0           L0B01:    ld        a, (0xC000) 
0b04 a7                           and       a 
0b05 28 14                        jr        z, L0B1B 
0b07 db dc                        in        a, (0xDC) 
0b09 47                           ld        b, a 
0b0a f6 c0                        or        0xC0 
0b0c 4f                           ld        c, a 
0b0d db dd                        in        a, (0xDD) 
0b0f f6 c0                        or        0xC0 
0b11 cb 10                        rl        b 
0b13 17                           rla        
0b14 cb 10                        rl        b 
0b16 17                           rla        
0b17 47                           ld        b, a 
0b18 c3 ac 0b                     jp        L0BAC 
0b1b 3e 07              L0B1B:    ld        a, 7 
0b1d d3 de                        out       (0xDE), a 
0b1f db dc                        in        a, (0xDC) 
0b21 47                           ld        b, a 
0b22 f6 c0                        or        0xC0 
0b24 4f                           ld        c, a 
0b25 3e 07                        ld        a, 7 
0b27 d3 de                        out       (0xDE), a 
0b29 db dd                        in        a, (0xDD) 
0b2b cb 10                        rl        b 
0b2d 17                           rla        
0b2e cb 10                        rl        b 
0b30 17                           rla        
0b31 f6 c0                        or        0xC0 
0b33 47                           ld        b, a 
0b34 3e 01                        ld        a, 1 
0b36 d3 de                        out       (0xDE), a 
0b38 db dc                        in        a, (0xDC) 
0b3a cb 57                        bit       2, a 
0b3c 20 02                        jr        nz, L0B40 
0b3e cb 90                        res       2, b 
0b40 cb 5f              L0B40:    bit       3, a 
0b42 20 02                        jr        nz, L0B46 
0b44 cb 88                        res       1, b 
0b46 3e 02              L0B46:    ld        a, 2 
0b48 d3 de                        out       (0xDE), a 
0b4a db dc                        in        a, (0xDC) 
0b4c cb 4f                        bit       1, a 
0b4e 20 02                        jr        nz, L0B52 
0b50 cb 80                        res       0, b 
0b52 cb 67              L0B52:    bit       4, a 
0b54 20 02                        jr        nz, L0B58 
0b56 cb a1                        res       4, c 
0b58 3e 03              L0B58:    ld        a, 3 
0b5a d3 de                        out       (0xDE), a 
0b5c db dc                        in        a, (0xDC) 
0b5e cb 57                        bit       2, a 
0b60 20 02                        jr        nz, L0B64 
0b62 cb 98                        res       3, b 
0b64 cb 67              L0B64:    bit       4, a 
0b66 20 02                        jr        nz, L0B6A 
0b68 cb a9                        res       5, c 
0b6a 3e 04              L0B6A:    ld        a, 4 
0b6c d3 de                        out       (0xDE), a 
0b6e db dc                        in        a, (0xDC) 
0b70 cb 6f                        bit       5, a 
0b72 20 02                        jr        nz, L0B76 
0b74 cb 89                        res       1, c 
0b76 3e 05              L0B76:    ld        a, 5 
0b78 d3 de                        out       (0xDE), a 
0b7a db dc                        in        a, (0xDC) 
0b7c cb 6f                        bit       5, a 
0b7e 20 02                        jr        nz, L0B82 
0b80 cb 91                        res       2, c 
0b82 3e 06              L0B82:    ld        a, 6 
0b84 d3 de                        out       (0xDE), a 
0b86 db dc                        in        a, (0xDC) 
0b88 cb 6f                        bit       5, a 
0b8a 20 02                        jr        nz, L0B8E 
0b8c cb 99                        res       3, c 
0b8e cb 77              L0B8E:    bit       6, a 
0b90 20 02                        jr        nz, L0B94 
0b92 cb 81                        res       0, c 
0b94 3e 05              L0B94:    ld        a, 5 
0b96 d3 de                        out       (0xDE), a 
0b98 db dd                        in        a, (0xDD) 
0b9a cb 5f                        bit       3, a 
0b9c 20 02                        jr        nz, L0BA0 
0b9e cb a0                        res       4, b 
0ba0 3e 06              L0BA0:    ld        a, 6 
0ba2 d3 de                        out       (0xDE), a 
0ba4 db dd                        in        a, (0xDD) 
0ba6 cb 57                        bit       2, a 
0ba8 20 02                        jr        nz, L0BAC 
0baa cb a8                        res       5, b 
0bac 3a 70 c0           L0BAC:    ld        a, (0xC070) 
0baf b7                           or        a 
0bb0 c0                           ret       nz 
0bb1 21 0e c0                     ld        hl, 0xC00E 
0bb4 cb 7e                        bit       7, (hl) 
0bb6 20 15                        jr        nz, L0BCD 
0bb8 79                           ld        a, c 
0bb9 2f                           cpl        
0bba e6 30                        and       0x30 
0bbc 28 05                        jr        z, L0BC3 
0bbe cb fe                        set       7, (hl) 
0bc0 cb b6                        res       6, (hl) 
0bc2 c9                           ret        
0bc3 78                 L0BC3:    ld        a, b 
0bc4 2f                           cpl        
0bc5 e6 30                        and       0x30 
0bc7 c8                           ret       z 
0bc8 cb fe                        set       7, (hl) 
0bca cb f6                        set       6, (hl) 
0bcc c9                           ret 
0bcd cb 76              L0BCD:    bit       6, (hl) 
0bcf 28 08                        jr        z, L0BD9 
0bd1 3a 91 c0                     ld        a, (0xC091) 
0bd4 fe 50                        cp        0x50 
0bd6 78                           ld        a, b 
0bd7 28 01                        jr        z, L0BDA 
0bd9 79                 L0BD9:    ld        a, c 
0bda 2f                 L0BDA:    cpl        
0bdb 32 08 c0                     ld        (0xC008), a 
0bde c9                           ret        


Also have found that all the PSG hits are concentrated together.  Might just replace the code with the MSX equivalent (same chip as the Nabu, different from the SG), dunno.

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  • 3 weeks later...
  • 2 weeks later...
  • 1 month later...

We will have a Nabu PC on exhibit at the Pacific Commodore Expo NW this weekend.


Hey, that's not a Commodore,
Robert Bernardo
Fresno Commodore User Group - http://www.dickestel.com/fcug.htm

Southern California Commodore & Amiga Network - http://www.portcommodore.com/sccan
June 24-25 Pacific Commodore Expo NW 2023 - http://www.portcommodore.com/pacommex

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