TI Mini Expansion System

+dhe · July 29

Does anyone have the PAL and EPROM for Winklers GROM board?

+Ksarul · July 29

1 hour ago, dhe said:

Does anyone have the PAL and EPROM for Winklers GROM board?

Which one do you speak of? The only special board I know of that Winfried developed was for his Speech Synthesizer in the PEB with additional vocabulary accessed via the DSR.

There was the GRAM Karte from Mechatronic

and the SPGPL PEB board from SNUG designed by Michael Becker

Then there was the Wiesbaden Supermodul and Supermodul II from TIWW and designed by Juergen Stelter, Horst Wiese, and Sven Dyroff

Lastly, there was a group of mostly identical variants of the Heiner Martin board with up to five GROMs and a ROM on them (TI Club Baunatal, TI Club Hamburg, the Karlsruhe Modul from the Stuttgart UG, one from the Berlin UG, and probably one or two others that I never came across--like one that I think the Vienna UG made).

+dhe · July 29

I received GROMO today! W00T WOOT!

Upon closer inspection, Martin, no PAL needed.

I known working GROM and ROM Image would be of aid.

Thanks you much Artoj, it's like Christmas!

Gary from OPA · July 30

1 hour ago, dhe said:

Thanks you much Artoj, it's like Christmas!

Christmas in July.

What module you want to burn it.

I can make up an image for you.

Do you have a picture of the board from artoj.

I need to scroll backwards and see what one this was.

Artoj · July 30

Here is the Pic.

+dhe · July 30

Mine specifically. Yea, it's my kitchen counter - circa, 1986.

Artoj · July 31

Hi All,

I am almost ready for another order, this time I have added a basic 1 Meg AMS card that has room for a PI PICO if you want to use it. This card was made so it would not cost too much to expand a basic console.

3 x 74LS244

1 X 74LS245

1 X 74LS138

1 X 74LS688

1 X 74LS08

1 X 74LS32

1 X 74LS04

1 X 74LS259

1 X 74LS612

2 X ASC4008-55PCN (512Kx8)

1 X 7805

1 X 0.1 Uf

1 X 47Uf

11 X 100 nF

1 X 1N4007

PLUS assorted PIN Headers as required

and a PI PICO if you are looking at experimenting

Regards Arto

Edited July 31 by Artoj

Artoj · August 1

As I was going through all my "Need to do" lists, I figured I need to add an interesting "Add on" (might need a DSR) that will simplify storage. Has anyone looked at the CH376S? There is even a low cost evaluation board from Amazon. Regards Arto

CH376.pdf

Artoj · August 1

Hi All,

I am drawing a table of Peripheral usage as I am looking at adding a few useful cards. Here is the useful information that can be used to interface the CH376S chip in parallel mode, which is the best method to use with the CRU I/O , Data and TI99 I/O bus lines.

CH376S
------

Signals used on the CH376S for Parallel port use.

PIN NAME TYPE DESCRIPTION

8 A0 INPUT A=0 READ AND WRITE DATA
A=1 WRITE COMMANDS OR READ STATUSES
4 RD# INPUT READ STROBE OF PARALLEL PORT

ACTIVE AT LOW LEVEL
BUILT IN PULL-UP RESISTOR

3 WR# INPUT WRITE STROBE OF PARALLEL PORT
ACTIVE AT LOW LEVEL
BUILT IN PULL-UP RESISTOR
27 PCS# INPUT CHIP SELECTION CONTROL INPUT OF PARALLEL PORT
ACTIVE AT LOW LEVEL
BUILT IN PULL-UP RESISTOR

1 INT#   OUTPUT INTERRUPT REQUEST OUTPUT
ACTIVE AT LOW LEVEL
BUILT IN PULL-UP RESISTOR
2 RSTI   INPUT EXTERNAL RESET INPUT
ACTIVE AT LOW LEVEL
BUILT IN PULL-DOWN RESISTORS
15 D0 IN/OUT D7   TI CONVENTION IN = A0=0 + WR#=1 + RD#=0 + PCS#=0
OUT = A0=0 + WR#-0 + RD#=1 + PCS#-0
16 D1 IN/OUT D6   "
17 D2 IN/OUT D5   "
18 D3 IN/OUT D4   "
19 D4 IN/OUT D3   "
20 D5 IN/OUT D2   "
21 D6 IN/OUT D1   "
22 D7 IN/OUT D0   "

I am aware of many new cards, does anyone have a complete table with all the new devices included, I have copied most of this from "TI-99/4A Technical Servicing Manuals and Programmer Guides". regards Arto.
                   Addr. Established Assigned
Peripheral Space Lines    Function*            Function            Notes
----------------   34567    ------- ------- -----
>1000->10ҒЕ        10000    -                    mass storage        1
>1100->11ҒЕ        10001    disk controller disk controller
>1200->12FE        10010    (home security) math coprocessor    2
>1300->13ҒЕ        10011 RS232-1 RS232-1
>1400->14ЕЕ        10100 (internal modem) internal modem 3
>1500->15ҒЕ        10101    RS232-2 RS232-2
>1600->16ЕЕ        10110    (digital cassette) prototype low 4
>1700->17ҒЕ        10111    Hex Bus attached computer 5,6
>1800->18FE        11000    thermal printer MIDI/music 5,7
>1900->19FE        11001    (eprom programmer) programmer 8
>1A00->1AFE        11010    (student typing) speech/DSP 9
>1800->1ВЕЕ        11011    (debugger card) Utility card        10
>1С00->1СҒЕ        11100    video                video
>1D00-»1DFE        11101    IEEE 488 control real time clock 5,11
>1Е00->1ЕЕЕ        11110    - prototype high 4
>1FOO->1FFE        11111    P-code P-code

Table Notes

1) Mass storage is currently defined as RAM disks, but also includes other media such as CD-ROM.

2) Position ?1200 is reserved for high speed math co-processors, which may be interrupt driven and require quick response times.

3) An internal modem is defined as a standalone peripheral with direct connection to telephone lines, with no interface to the RS232 devices.

4) Prototype locations (low and high) are left undefined for prototype circuits and undefined future products.

5) These card positions were defined by TI; however, the peripheral either was not released, or is seldom used. Therefore, this peripheral space was reassigned.

6) Attached computer or microprocessor refers to a self contained computer system with its own microprocessor. This space can also be utilised for interfacing to independent computers.

7) This space is reserved for electronics music devices.

This space is reserved for programmers of various devices, such as PROM, E(E)PROM, PAL, etc.

9) This space is reserved for speech and/or digital signal processing devices.

10) A utility card refers to peripherals designed to enhance or supplement development of аззем Бу or other advanced program applications.

11) Real time clock peripheral space; also used as RTC space by some third party products.

Gary from OPA · August 1

It getting tight cru wise, my system is basically packed with only 1200 could be used and 1900. But once I get a ide card then 1900 will be gone. But most users don't have two PEBs joined together and multiple different storage devices.

Safely, as long as you can allow user to select the cru base. The more uncommon ones not used is 1a00 and 1c00, the rest have basically all been used by various devices out there, I moved my SCSI and hdfc to those addresses as I wanted my tipi at 1000, and to have 1200 free for second horizon or another device, 1700 going to be used by my pgram when installed in the same box. And I have pcode at 1f00 it just not shown on the attached screenshot. The 1400 is the dijit/avpc card.

Of course nothing stopping us from using 0100 to 0f00, as long as we writing new software to support it, just current software wouldn't scan for it, but that could be patched easy enough as well.

Edited August 1 by Gary from OPA

RickyDean · August 1

5 minutes ago, Gary from OPA said:

It getting tight cru wise, my system is basically packed with only 1200 could be used and 1900. But once I get a ide card then 1900 will be gone. But most users don't have two PEBs joined together and multiple different storage devices.

Safely, as long as you can allow user to select the cru base. The more uncommon ones not used is 1a00 and 1c00, the rest have basically all been used by various devices out there, I moved my SCSI and hdfc to those addresses as I wanted my tipi at 1000, and to have 1200 free for second horizon or another device, 1700 going to be used by my pgram when installed in the same box. And I have pcode at 1f00 it just not shown on the attached screenshot. The 1400 is the dijit/avpc card.

Of course nothing stopping us from using 0100 to 0f00, as long as we writing new software to support it, just current software wouldn't scan for it, but that could be patched easy enough as well.

I would ask you one question though, why a floppy controller and an HFDC? If you used the HFDC for both, you'd have another usable slot?

Gary from OPA · August 1

1 hour ago, RickyDean said:

I would ask you one question though, why a floppy controller and an HFDC? If you used the HFDC for both, you'd have another usable slot?

i could, but currently i have two 3.5" drives on the hdfc in 1 peb, and the 3.5" and 5.25" on myarc fdc on the other peb. -- mainly because, this is my development machine, so i want to test software on all possible devices via one machine, so having 1.44mb, 720k, 360k drives all working at once is good as well, via two different controllers, i could have 8 physical floppies if i wanted with this setup, only thing is floppy drives are costly these days, should had bought more when they were dirt cheap. but i am planning on adding at least two more floppies soon. -- i want to add ide card as well, so i will have 3 different types of mass storage soon, mfm, scsi, ide -- i need a usb card at some point also, running out of slots, but i have more peb's, so might try to add a 3rd one soon, as i need forti card as well.

Artoj · August 2

9 hours ago, Gary from OPA said:

I need a usb card at some point also, running out of slots, but i have more peb's, so might try to add a 3rd one soon, as i need forti card as well.

Both those cards will be available soon(soon to me is about a year LOL), the Music Card(SID+ADC+DAC+More)and will have Forti onboard and the USB card is what I am looking at now. I have looked at so many ways to implement a USB port without adding another CPU (AVR32,PICO, PI etc), the few options are FTDI<>RS232 and a dedicated bus to USB which is what the CH376S chip is (with other options as well), I tried to build one from base up and basic logic only, the task became confusing and beyond the scope of doable by this method, speed, memory and complexity was an issue, so a dedicated bus converter was the ONLY option for my approach. The White paper on USB is 600 pages of open ended, abstracted with some circular thinking, not a good read and not a simple way to build a schematic from an idea, so I figured the USB was only the beginning of an evolution of designs, as I have seen with different implementations since the original USB A. To me a Relay is one of the most useful devices every designed, with the help of Nicola Tesla and his first application of an AND gate in 1900, we have moved light years in comparison, still a relay works and can be used and built without any priority parts.

As I am not an Electrical/Electronic Engineer and enjoy this activity exactly as an Artist enjoys painting or drawing, I have to understand my pallet completely before I can paint, the rest is pure joy, I might make a few errors but by more application of study, reading, testing and help from like minded hobbyists(Atari Forum) , I gain a clear understanding, so I can find them, fix them and quiet often improve the overall design and function. This has been my approach with the Ternary Project as there are no manuals or other prototypes to follow, the TI99 has afforded me a second avenue of the learning curve that includes the historic design and knowledge of many of the best in CPU and Electronic design(TI) in my rediscovery of the TI99/4A. Regards Arto.

Edited August 2 by Artoj

Artoj · August 3

Hi All,

Here is the first step, the rest has many directions, Memory Map and/or CRU with or without DSR, I prefer DSR as all standard TI disk functions are preserved, with added routines to cover both USB and SD card. I might have to write the whole DSR from scratch, I have already started getting all the PAB and file routines I will need. I wonder if I could adapt a well written DSR to short cut the arduous writing of assembly to cover the file system. Anyway the USB project has begun, let's see where it takes me and how long before it becomes functional. Regards Arto

Edited August 3 by Artoj

Gary from OPA · August 3

1 minute ago, Artoj said:

Hi All,

Here is the first step, the rest has many directions, Memory Map and/or CRU with or without DSR, I prefer DSR as all standard TI disk functions are preserved, with added routines to cover both USB and SD card. I might have to write the whole DSR from scratch, I have already started getting all the PAB and file routines I will need. I wonder if I could adapt a well written DSR to short cut the arduous writing of assembly to cover the file system. Anyway the USB project has begun, let's see where it takes me and how long before it becomes functional. Regards Arto

If you need help on DSR I am more than willing. You can take a look at the horizon ros source code as well to get an idea. All tho it's designed to run from ram not a eprom.

Artoj · August 3

11 hours ago, Gary from OPA said:

You can take a look at the horizon ros source code

Thanks Gary, I was thinking of your expertise when I wrote that. I have already started looking at some of the ROS code I found in the book by Tony Lewis. I was thinking it should contain all the references and subroutines for file handling, I will have to change some of the CRU controls to suit, that should be no problem, the base CRU address is my greatest concern, I might have to make it selectable.

I will continue with hardware design until I am sure all the logic for control handlers are correct, I am treating it like a parallel port. Here are some of my notes, these are mainly the Command codes you can use to control the CH376S, these might have to be encoded into the DSR and linked to CALL sub routines etc. Regards Arto.

CH376S
------

Signals used on the CH376S for Parallel port use.

PIN NAME TYPE DESCRIPTION

8       A0 INPUT A=0   READ AND WRITE DATA
A=1   WRITE COMMANDS OR READ STATUSES
4       RD# INPUT READ STROBE OF PARALLEL PORT
ACTIVE AT LOW LEVEL
BUILT IN PULL-UP RESISTOR

3       WR# INPUT WRITE STROBE OF PARALLEL PORT
ACTIVE AT LOW LEVEL
BUILT IN PULL-UP RESISTOR
27 PCS# INPUT CHIP SELECTION CONTROL INPUT OF PARALLEL PORT
                       ACTIVE AT LOW LEVEL
                       BUILT IN PULL-UP RESISTOR

1       INT# OUTPUT INTERRUPT REQUEST OUTPUT
                       ACTIVE AT LOW LEVEL
                       BUILT IN PULL-UP RESISTOR
2       RSTI INPUT EXTERNAL RESET INPUT
                       ACTIVE AT LOW LEVEL
                       BUILT IN PULL-DOWN RESISTORS

15       D0       IN/OUT   D7   TI CONVENTION   IN    = A0=0 + WR#=1 + RD#=0 + PCS#=0
OUT   = A0=0 + WR#-0 + RD#=1 + PCS#-0
16       D1       IN/OUT   D6   "
17       D2       IN/OUT   D5   "
18       D3       IN/OUT   D4   "
19       D4       IN/OUT   D3   "
20       D5       IN/OUT   D2   "
21       D6       IN/OUT   D1   "
22       D7       IN/OUT   D0   "

Command Codes for CH376S
------------------------

CODE COMMAND NAME CMD# INPUT DATA OUTPUT DATA COMMAND PURPOSE
---- ----------------- ---------- ----------- ---------------

>01       GET_IC_VER VERSION GET THE CHIP AND FIRMWARE VERSIONS
>05       RESET_ALL (WAIT 36mS)       EXECUTE HARDWARE RESET
>06       CHECK_EXIST ANY DATA BITWISE NOT TEST THE COMMUNICATION INTERFACE AND OP STATUS
____________________________________________________________

>0C       GET_FILE_SIZE DATA >68       FILE LENGTH(4)   GET CURRENT FILE LENGTH
>15       SET_USB_MODE MODE CODE WAIT 10uS SET USB WORKING MODE
>22       GET_STATUS INTERRUPT STATUS GET THE INTERRUPT STATUS & CANCEL INT REQ
>27       RD_USB_DATA0 DATA LENGTH READ THE DATA BLOCK FROM THE ENDPOINT
BUFFER OF THE CURRENT USN INT OR
DATA STREAM(n) FROM THE RECEIVE BUFFER OF THE HOST ENDPOINT
>2C       WR_HOST_DATA DATA LENGTH                       WRITE THE DATA BLOCK TO THE TRANSMIT
                           DATA STREAM(n) BUFFER OF THE USB HOST ENDPOINT
>2D       WR_REQ_DATA DATA LENGTH WRITE THE REQUESTED DATA BLOCK TO THE
                           DATA STREAM(n) INTERNAL SPECIFIED BUFFER
>2E       WR_OFS_DATA OFFSET ADDRESS WRITE THE DATA BLOCK TO THE SPECIFIED
                           DATA LENGTH                       OFFSET ADDRESS OF THE INTERNAL BUFFER
                           DATA STREAM(n)
_____________________________________________________________

>2F       SET_FILE_NAME CHARACTER STRING(n) SET THE FILENAME OF THE FILE TO BE OPERATED
>30       DISK_CONNECT GEN INTERRUPT CHECK WHETHER THE DISK IS CONNECTED
>31       DISK_MOUNT GEN INTERRUPT INITIALISE THE DISK AND TEST IF READY
>32       FILE_OPEN GEN INTERRUPT OPEN FILES OR DIRECTORIES, ENUMERATE
FILES AND DIRECTORIES
>33       FILE_ENUM_GO GEN INTERRUPT CONTINUE ENUMERATING FILES AND DIRECTORIES
>34       FILE_CREATE GEN INTERRUPT NEW FILE
>35       FILE_ERASE GEN INTERRUPT DELETE FILE
>36       FILE_CLOSE WHETHER UPDATE GEN INTERRUPT CLOSE CURRENT OPEN FILE OR DIRECTORY
                           IS ALLOWED
>37       DIR_INFO_READ DIRECTORY INDEX GEN INTERRUPT READ THE DIRECTORY INFORMATION FOR THE FILE
                           NUMBER
>38       DIR_INFO_SAVE GEN INTERRUPT SAVE THE DIRECTORY INFORMATION FOR THE FILE
>39       BYTE_LOCATE NUMB OF OFFSET GEN INTERRUPT MOVE THE CURRENT FILE POINTER IN BYTES
                           BYTES(4)
>3A       BYTE_READ NUMB OF BYTES   GEN INTERRUPT READ DATA BLOCK FROM THE CURRENT
                           REQUESTED(2) LOCATION IN BYTES
>3B       BYTES_RD_GO GEN INTERRUPT CONTINUE BYTE READ
>3C       BYTE_WRITE NUMB OF BYTES   GEN INTERRUPT WRITE DATA BLOCKS TO THE CURRENT LOCATION IN BYTES
                           REQUESTED(2)
>3D       BYTE_WRITE_GO GEN INTERRUPT CONTINUE BYTE WRITE
>3E       DISK_CAPACITY GEN INTERRUPT INQUIRE THE PHYSICAL CAPACITY OF DISK
>3F       DISK_QUERY GEN INTERRUPT INQUIRE THE SPACE INFORMATION OF THE DISK
>40       DIR_CREATE GEN INTERRUPT CREATE A NEW DIRECTORY AND OPEN IT OR
OPEN AN EXISTING DIRECTORY
>4A       SEC_LOCATE NUMB OF OFFSET   GEN INTERRUPT MOVE THE CURRENT FILE POINTER IN SECTORS
SECTORS(4)
>4B       SEC_READ NUMB OF GEN INTERRUPT READ DATA BLOCKS FROM THE CURRENT
REQUESTED SECTORS LOCATION IN SECTORS
>4C       SEC_WRITE NUMB OF GEN INTERRUPT WRITE DATA BLOCKS TO THE CURRENT
REQUESTED SECTORS LOCATION IN SECTORS
>50       DISK_BOC_CMD GEN INTERRUPT EXECUTE BO TRANSPORT PROTOCOL COMMANDS
ON USB MEMORY
>54       DISK_READ LBA SECTOR       GEN INTERRUPT READ PHYSICAL SECTORS FROM USB MEMORY

ADDRESS(4)
NUMB OF SECTORS
>55       DISK_RD_GO GEN INTERRUPT CONTINUE THE PHYSICAL SECTOR READ
OPERATION OF THE USB MEMORY
>56       DISK_WRITE LBA SECTOR       GEN INTERRUPT WRITE PHYSICAL SECTORS TO USB MEMORY

ADDRESS(4)
NUMB OF SECTORS
>57 DISK_WR_GO GEN INTERRUPT CONTINUE THE PHYSICAL SECTOR WRITE OPERATION OF THE USB MEMORY
___________________________________________________________

STATUS CODE STATUS NAME STATUS DESCRIPTION

>51 CMD_RET_SUCCESS OPERATED SUCCESSFULLY
>5F CMD_RET_ABORT OPERATION FAILURE

6. Functional Specification

6.1. Communication Interfaces of MCU

There are three communication interfaces supported between CH376S and MCU: 8-bit parallel interface, SPI synchronous serial interface and asynchronous serial interface. During chip power on reset, CH376S will sample the statuses of WR#, RD#, PCS#, A0, RXD and TXD pins, and select the communication interface according to the combination of these pin statuses. Refer to the following table (X in the table means that this bit is not concerned, 0 means low level, 1 means high level or suspended).

PINS

WR#    RD#    PCS#     A0        RXD    TXD Select the communication interface

0 0 1 1        1        1        SPI interface

1 1 1 1        1        1        Asynchronous serial interface

1 1/X 1/X X 1 0 8-bit parallel port

CH376S chip does not work
RST pin always outputs high level

There are two communication interfaces supported between CH376T and MCU: SPI synchronous serial interface and asynchronous serial interface. During power on reset, CH376T chip will sample the state of SPI# pin. If SPI# is at low level, SPI interface will be selected; if SPI# is at high level, the asynchronous serial interface will be selected.

The interrupt request of INT# pin output of CH376 is active at low level by default and can be connected to the interrupt input pin or ordinary input pin of MCU. MCU can get the interrupt request of CH376 in interrupt mode or query mode. To save pins, MCU can get the interrupt in other way without being connected to INT# pin of CH376.

6.2. Parallel Interfaces

   The parallel port signal line includes: 8-bit bidirectional data buses D7-D0, read strobe input pin RD#, write strobe input pin WR#, chip selection input pins PCS# and address input pin A0. PCS# pin of CH376 is driven by the address decoding circuit, which is used for device selection when MCU has multiple peripheral devices. CH376 can be easily hooked to the system buses of various 8-bit DSP and MCU through a passive parallel interface, and can coexist with multiple peripheral devices.

   For MCU similar to the Intel parallel port timing sequence, RD# and WR# pins of CH376 can be connected to the read strobe output pin and write strobe output pin of MCU respectively. For MCU similar to Motorola parallel port time sequence, RD# pin of the CH376 shall be connected to the low level, and the WR# pin shall be connected to the reading and writing direction output pin R/-W of MCU.

   The following table is the truth table of the parallel port I/O operation (X in the table means that this bit is not concerned, and Z means that three states of CH376 are disabled).

PCS# WR# RD# A0 D7-D0 Actual operation on CH376

1        X X X        X/Z CH376 is not selected, and no any operation is made
0        1 1 X        X/Z Although selected, no any operation is made
0        0 1/X 1        Input    Write a command code to the command port of CH376
0        0 1/X 0        Input    Write data to the data port of CH376
0        1 0 0        Output Read data from the data port of CH376
0        1 0 1        Output   Read interface status from the command port of CH376:
Bit 7 is an interrupt flag, active low, equivalent to INT# pin,
Bit 4 is a busy flag, active high, equivalent to BZ pin of SPI interface

CH376 occupies two address bits. When A0 pin is at high level, write a new command, or read the interface status; when A0 pin is at low level, select the data port to read and write the data.

   MCU reads and writes CH376 through an 8-bit parallel port. All operations are composed of a command code, several input data and several output data. Some commands do not need input data, and some commands do not have output data. The command operation steps are as follows:

   ①、 MCU writes the command code to the command port when A0 is 1;
   ②、 If the command has input data, write the input data in sequence when A0 is 0, one byte at a time;
   ③、 If the command has output data, read the output data in sequence when A0 is 0, one byte at a time;
   ④、 The command is completed. The interrupt notification will be generated for some commands. MCU can be paused or go to ① to continue to execute the next command.

7.4. Parallel Port Timing Parameters

Test Conditions: TA=25℃, VCC=5V, Parameter in Brackets VCC=3.3V, refer to the attached figure (RD means that RD# signal is valid and PCS# signal is valid; perform read operation when RD#=PCS#=0) (WR means WR# signal is valid and PCS# signal is valid, perform write operation when WR#=PCS#=0)

Name Parameter description Min. Typ. Max. Unit

TWW    Write pulse width 30(45) nS
TRW    Read pulse width                            40(60) nS
TAS    Address input setup time before RD or WR    4(6)                                nS
TAH    Address input hold time after RD or WR 4(6)                                nS
TIS    Data setup time before Write HIGH 0 nS
TIH    Data hold time after Write HIGH 4(6)                                nS
TON    Data output valid after Read active 2 12 18(30) nS
TOF    Data output invalid after Read inactve 3 16 24(40) nS

___ ______________ ____ ___ _________________ ___
A0 \/ ADDR IN \/ \/ ADDR IN \/
___/\______________/\____ ___/\_________________/\___
| TAS|TWW|TAH | |TAS| TRW |TAG |
| | | | | | | |
WR# ________ | | _________ ________|_______|________ PCS# = WR#
\| |/ | |
\___/ | |
RD# _________|___|__________ _______ | | _______ PCS# = RD#
| | \| |/
| TIS | |TIH | \___|___/ TOF |
| ____|___|_____ | |TON| __|_____ |
D0-7 _____/ DATA IN \____ _____________/ DOUT \___
\______________/ \________/

|<--TIS-->|<--TSC-->|<--TSD--->|<--TSC--->|<--TSC-->|<--TSD-->|
______ ________ ____________________________ ______ ______ ________
WR# |__| |__| |__| |__| |__|

RD# ______________________________ ______ _____________________________________
|__| |__|
_______ _______ ___ ___ _____ _____ ______
D0-7 ___/ CMD \__/ CMD \________/ RD\_____/ RD\__/ CMD \__/ WR \__/ WR \_______
\_______/ \_______/ \___/ \___/ \_____/ \_____/ \______/
________ _______ _______
A0 ____| |_| |________________________| |_________________________

____ ____ __ ___ ____ __ ___
BZ __________| |_____| |______| |_______| |____| |____| |_____| |_____

COMMAND 1 --->|<-------- COMMAND 2 -------->|<----- COMMAND ---------->|

Edited August 4 by Artoj

Artoj · August 4

Hi All,

Here is my latest sketch, regards Arto

Schematic_TI99-CH376S-card-v2.0_2024-08-05.pdf

Artoj · August 15

Hi All,

I am waiting for the CH376s module to arrive, in the meantime, I had to make a LPT card for the 8 Bit ISA bus so I could figure out the interface for the MPEB TISA Expansion Bus, which will be my final Card design. Here is the schematic, I had fun using KiCAD, a much more elegant design regime than EasyCAD, which is simple for making boards in a jiffy. I will test this with my Old IBM to make sure it works, then comes the fun part, making the same card work with the TI99, regards Arto.

Artoj · August 19

Hi All,

I was so excited about building the ISA card, I pushed my interface schedule ahead, I have now completed the FIRST design that should be able to use some ISA cards. the TISA99 MPEB card V1.0. Now that I have a un-expanded and working TI99/4A thanks to Troy, I will start finalising all the boards that I need to make my work complete. I am looking forward to writing a DSR and TMS9900 assembly for this unit, also for the USB/SD card and many other Hardware items I have been working on. I am trying to use all standard through-hole 74 series chips in all my projects.

A couple of years ago I was determined to finish at least 10 of the hardware designs I started back in the 80's, now that the many room 99 house is almost completely built I can start occupying it with Software and make it home for ideas, research, study, recreation, scientific enquiry, interface to the real world, artwork, poetry, writing and invention. As time goes on the TMS9900 engine will possibly expanded to the TMS99105 or even a NEW TMS99900 which hasn't even been thought of yet, or maybe the TIers here in the forum have already thought of these new possibilities. I am aware of my fellow Finn, Erik Piehl's (speccery) fine work on a FPGA version of the TMS99105, this together with the advanced ideas I've seen in the TI forum, many new things will be made.

Here is version 1.0, much of the grunt work is done with the CRU, where as the software will be written in the DSR, I will need to test my work with RXB as the first entry level to testing basic CRU functionality. Where can I get a RXB cartridge, do I need to make an EPROM and make my own cart? Regards Arto.

Edited August 19 by Artoj

RickyDean · August 19

@Artoj not knowing if you have a FinalGrom99 or not, if you have one, RXB can be placed on it as well as most any cartridge image? If not, do you have a GramKracker or an Ubergrom board, or other rom/grom emulator to load it on?

Artoj · August 19

27 minutes ago, RickyDean said:

Artoj not knowing if you have a FinalGrom99 or not, if you have one, RXB can be placed on it as well as most any cartridge image? If not, do you have a GramKracker or an Ubergrom board, or other rom/grom emulator to load it on?

Thanks Ricky, I now have a FinalGROM99 board thanks to Troy, with no chips as yet, I will get the BOM and try (tiny weeny) to solder the SMD bits on it. I was hoping to plug a Cart in and go, but I will still need storage, as my FDC has not been built yet. This is why I decided to look at the CH376S chip, as both USB and SD cards can be used, still I will need to start programming in earnest. The TI99 was my first competent Home Computer, it taught me so much, I look forward to writing lots of software. Regards Arto.

+FarmerPotato · August 20

On 8/19/2024 at 10:38 AM, Artoj said:

This is why I decided to look at the CH376S chip, as both USB and SD cards can be used,

That's an interesting chip, building block of USB support.

SD card (really, MMC), on the other hand, in 1-bit SPI mode, can be connected directly to the CRU bus. You need a couple outputs from 9901 or otherwise, but LDCR and STCR can neatly clock 8 or 16 bits in or out.

The only gotcha is that the bits are in reverse order. CRU does LSB first, SPI expects MSB first.

Also, you can get the MMC card module in thru-hole, as seen in FlashROM99. Still many other card slot modules are offered for Arduino. My favorite is the Digilent PMOD connector: always 1x6 or 2x6 thru hole. Choose either MMC or SD. (My machine uses the Digilent MMC and FTDI modules.)

Artoj · August 24

On 8/21/2024 at 5:39 AM, FarmerPotato said:

SD card (really, MMC), on the other hand, in 1-bit SPI mode, can be connected directly to the CRU bus.

Absolutely, first choice, still I want it as flexible for programmers writing the software as possible, so I decided to use the CRU switches in the initialisation registers and use the CRU to load the read, write and command registers. This way the commands for the filing system would be a simple CRU switch to initiate each basic function, regardless of which setup you use(SPI, RS232, PIO). I have not put all the different modes on board as yet, I have only put the PIO circuitry in. I have left enough pads and links so these can be added later, you can use the SPI and RS232 mode but nothing will happen, they will be initialised though and ready to go. Regards Arto.

No. CRU PCS# WE# RD# A0 CRU TB

N0 = SBO 0   TURN ON DSR AND SELECT CH376S NOP 0   1   1   1 TB 0
N1 = SBZ 0   TURN OFF DSR AND CH376 NOT SELECTED 1   X   X   X TB 0
N2 = SBO 1   WRITE DATA TO DATA PORT 0   0   1   0 TB 1
N3 = SBZ 1   READ DATA FROM DATA PORT 0   1   0   0 TB 1
N4 = SBO 2   WRITE COMMAND CODE TO THE COMMON PORT 0   0   1   1 TB 2
N5 = SBZ 2   READ INTERFACE STATUS FROM COMMAND PORT 0   1   0   1 TB 2
RXD TXD TB6 TB7
N6 = SBO 3   SET UP PARALLEL PORT 1   1   1   0   1   0   0   0
N7 = SBO 4   SET UP SPI INTERFACE 1   0   0   1   1   1 0   1
N8 = SBO 5   SET UP RS232 INTERFACE 1   1   1   1   1   1   1   0

The TB was added to check which mode (SPI.PIO.RS232) the device is set to, not yet implemented on V3.0. This way the programmer will know how it is being setup.

Edited August 24 by Artoj

Artoj · August 24

As I will need a 32K with some of my MPEB system boards, this board can be used either - by itself, jumper-ed on an existing MPEB board or under the board(depending on your connectors) or slotted on the 3 or 5 slot 44 expansion board, that I have previously designed. Regards Arto.

+dhe · August 24

Hi @Artoj

Today at the zoom meeting (which would be great if you could attend sometime! 😃 ) -

@Gary from OPA mentioned TI's Main Frame Ram Trap Tester.

I remembered Geoff Trott created the console tester - a side car unit.

Would that be something you have access to, and any interest in reproducing?

TI Mini Expansion System

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