bigmessowires Posted January 28 Author Share Posted January 28 (edited) Right, that's why you need the OR circuit to drive some of the address bits onto the data bus. EDIT: At any address, the 6507 will see the data byte 0 1 0 (A1 or A0) 1 1 0 0. So the memory map will look like this: 5C4C: 4C 5C4D: 5C 5C4E: 5C ... 5C5C: 4C 5C5D: 5C 5C5E: 5C ... FFFC: 4C FFFD: 5C Edited January 28 by bigmessowires 1 Quote Link to comment Share on other sites More sharing options...
+batari Posted January 28 Share Posted January 28 5 hours ago, Ben_Larson said: I've probably been staring at old arcade schematics for too long but it seems like something like this might be solvable in hardware by tying an address line to a bus transceiver to disconnect the ARM when the 6507 is accessing RAM/TIA space. I'm not even sure if we're talking about existing hardware or new hardware at this point, though. I suggested something like that in another thread. It could work Quote Link to comment Share on other sites More sharing options...
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