Build your own Colecovision at home!

[electro_sparkles]

That's right! There is now a project to fully build your own Colecovision. The github repository contains most of the information needed to build your own from scratch.

 

The idea of this project was to provide a extensive amount of documentation of the system, including the creation of the original PCB's. I used original parts as much as possible, and only varied if parts no longer exist. For instance the RF sub board has a variable tank no longer made. This is substituted with a variable coil plus capacitor.

 

Project Contents:

• schematic (kicad 7)
• PCB (kicad 7)
• datasheets (PDF)
• 3D printable case parts (inventor 2024/STL exports)
• Wiki guides

 

Console Project: https://github.com/sparkletron/righteous_tentacle_colecovision

Controller Project: https://github.com/sparkletron/Colecovision_Controller

 

After creating my own schematic I did verify it by using @ChildOfCv schematic as a reference. He did a great job, and saved me a great deal of time (My RF board contained the errors, go figure the easier board!). Special thanks to him for his work. There are minor value differences since mine is based on rev F vs the later rev that his is based on.

 

The PCB is as 1:1 as I could make it to the original, alterations for DB9 ports, and non-plated hole building were made to make it easier for mills/etching a PCB.

 

On that note my dream is to turn this into a community project, where people can update the schematic and create a pull request with there revision of the PCB. Creating a complete repository that documents all the revisions.

 

No there is no step by step on how to assemble and create. If people would like that, make it a pull request on the wiki and will go from there. Some ideas for issue requests are below.

• PCB creation guide
• 3D printed parts guide
• Full assembly guide
• Controller guide

If anyone wants to help out with the above let me know!

 

The wiki page https://github.com/sparkletron/righteous_tentacle_colecovision/wiki/Tear-Down-Notes describes the tear down process.

 

Parts listing for purchasing: https://github.com/sparkletron/righteous_tentacle_colecovision/wiki/Detailed-Part-Listing-For-Orders

 

Documentation of various signals: https://github.com/sparkletron/righteous_tentacle_colecovision/wiki/Testing-and-Verification

 

A few other minor notes, no I will not be selling any boards and I won't be selling any parts in general for this. This is for the community to enjoy and do with as they wish.

 

Enjoy!

-Jay

 

Pics Incoming...

 

- 3D printed case, with 3D printed controllers.

- Inside of the 3D printed case.

- Completed PCB during testing (created using a PCB mill).

- RF cage open

Edited June 20, 2023 by electro_sparkles
Forgot some stuff v3

[Pixelboy]

This looks nice. Does it fit inside an actual ColecoVision console plastic casing? 

 

[electro_sparkles]

16 minutes ago, Pixelboy said:

This looks nice. Does it fit inside an actual ColecoVision console plastic casing? 

 

Yes it does! It is an exact duplicate of the original PCB. Holes have been tested to fit.

 

Reset switch may work in the original, need to test that in the coming week.

 

Power switch almost works (original power switch will work, replacement is a bit off in length).

[doubledown]

Very, very cool!  Well done.

[kschewe]

I got 5 boards made jlcpcb.  I built 2 of them.  I was not able to get it working so far.  I am just waiting for some parts to arrive to test my memory chips.  I do not have a working coleco to help diagnose.  I can test logic chips with tl866. I bought multiple of each.  I did not make Rf board but I have one from a different revision board.  That might be my issue.   Can take composite signal without the rf board? If anyone else is making one from scratch let me know.  If you are local I just give a blank pcb if you pickup.  

[electro_sparkles]

On 11/3/2024 at 3:55 PM, kschewe said:

I got 5 boards made jlcpcb.  I built 2 of them.  I was not able to get it working so far.  I am just waiting for some parts to arrive to test my memory chips.  I do not have a working coleco to help diagnose.  I can test logic chips with tl866. I bought multiple of each.  I did not make Rf board but I have one from a different revision board.  That might be my issue.   Can take composite signal without the rf board? If anyone else is making one from scratch let me know.  If you are local I just give a blank pcb if you pickup.  

Frankly, you've given me nothing to go on. My question is do you know how to troubleshoot basic digital circuits? If so, start taking some measurements and post those, and I can try to help when you find something missing.

 

Make sure to set the ROM jumpers to your ROM type. The default is for a 32 KiB which will need to have the original concatenated to that size. Also means jumpers WJ4 and WJ5 must be populated.

 

TIPS:

- Check the ROM

- Check the Clock

- Check the VDP output on Y for a signal

- Check the Sound chip, if the bios inits it will output no sound.

Edited November 5 by electro_sparkles

[Tekman]

Thank you for taking all that time to recreate the CV PCBs. This project must have taken you forever and is much appreciated by everyone!

 

The MAIN_GERBER.zip on GitHub has a couple issues and failed inspection at JLCPCB. The main issue that triggered the error was the inclusion of the Edge.Cuts.Mill layer being incomplete and offset in broken sections messing with dimensional verification tests causing other things to also be offset. It shouldn’t even be included in the gerbers since Edge.Cuts is all that is needed by the fab house. The second issue was just looking to see what was wrong and immediately noticed the H3 mounting drill hole was incorrectly offset quite a bit, but noticed it was correct in the actual KiCAD PCB .brd file. I just simply removed the Edge.Cuts.Mill layer and others not needed by JLCPCB and created new gerbers. Everything now passed inspection with them and are currently in production.

 

The RF_GERBER.zip on GitHub also had a dimensional issue, but they never asked for me to get involved and they automatically started production. I didn’t discover this until after I was informed of the issue with the main board before I decided to even look and see if it had an issue. We’ll see how these look when I receive them.

 

I know you state that the included gerbers are not tested. At a minimum, I recommend Gerblook (https://gerblook.org) or similar online gerber viewers that import the complete zip file as a quick test to verify everything looks good before putting them on GitHub. It does a good job finding issues for the most part like in this case with both having dimensional issues and can’t even render the board properly.

[electro_sparkles]

1 hour ago, Tekman said:

Thank you for taking all that time to recreate the CV PCBs. This project must have taken you forever and is much appreciated by everyone!

 

The MAIN_GERBER.zip on GitHub has a couple issues and failed inspection at JLCPCB. The main issue that triggered the error was the inclusion of the Edge.Cuts.Mill layer being incomplete and offset in broken sections messing with dimensional verification tests causing other things to also be offset. It shouldn’t even be included in the gerbers since Edge.Cuts is all that is needed by the fab house. The second issue was just looking to see what was wrong and immediately noticed the H3 mounting drill hole was incorrectly offset quite a bit, but noticed it was correct in the actual KiCAD PCB .brd file. I just simply removed the Edge.Cuts.Mill layer and others not needed by JLCPCB and created new gerbers. Everything now passed inspection with them and are currently in production.

 

The RF_GERBER.zip on GitHub also had a dimensional issue, but they never asked for me to get involved and they automatically started production. I didn’t discover this until after I was informed of the issue with the main board before I decided to even look and see if it had an issue. We’ll see how these look when I receive them.

 

I know you state that the included gerbers are not tested. At a minimum, I recommend Gerblook (https://gerblook.org) or similar online gerber viewers that import the complete zip file as a quick test to verify everything looks good before putting them on GitHub. It does a good job finding issues for the most part like in this case with both having dimensional issues and can’t even render the board properly.

Darn, it's funny it picks up on that. I was hoping it wouldn't. Alright I'll fix it and update the zip.

 

Edge.Cuts.Mill is for my PCB mill, and the gaps help in the cutting process so it doesn't just pop out and get destroyed. 

 

Thanks for letting me know!

[electro_sparkles]

1 hour ago, Tekman said:

I know you state that the included gerbers are not tested. At a minimum, I recommend Gerblook (https://gerblook.org) or similar online gerber viewers that import the complete zip file as a quick test to verify everything looks good before putting them on GitHub. It does a good job finding issues for the most part like in this case with both having dimensional issues and can’t even render the board properly.

Totally missed this comment, most of the checks I've done are with open source software manually viewing layers. Though they are not automated and I honestly know it works fine. It was just the inclusion of the PCB mill file that messed this up.

 

Though I never gave much thought to an automated PCB Gerber verification flow. I do this for FPGA Verilog cores in simulation. Something I'll have to look at in the future.

 

It looks like I need two flows. PCB mill check and PCB fab, and then check and see if layers conform to what the process needs (hmm, maybe a yaml that describes it and then gets checked against it... hmmm).

 

Thanks for the heads up on the site. Only issue I have is it's a manual process, verification for my find needs to be automated so I don't get silly and add in mill files, again. 

 

Also to all who build this, post some pics of your boards! I'd love to see them.

 

Updated zip files seem to be good, did a quick upload to JLCPCB and it looks ok. gerblook seems ok too, no errors reported on uploads. They have been pushed to the github repo.

[kschewe]

On 11/4/2024 at 8:14 PM, electro_sparkles said:

Frankly, you've given me nothing to go on. My question is do you know how to troubleshoot basic digital circuits? If so, start taking some measurements and post those, and I can try to help when you find something missing.

 

Make sure to set the ROM jumpers to your ROM type. The default is for a 32 KiB which will need to have the original concatenated to that size. Also means jumpers WJ4 and WJ5 must be populated.

 

TIPS:

- Check the ROM

- Check the Clock

- Check the VDP output on Y for a signal

- Check the Sound chip, if the bios inits it will output no sound.

Sorry that was pretty vague information.  Once i get the rf board built I will report back.  Currently on order. 

I will share and give some info on ordering parts, maybe more challenging ordering from Canada.  I have a bom saved at mouser for most of the parts on this board.  

Thanks for your hard work making this btw.

[Tekman]

So far so good! I have the bare minimum of components installed to give it a quick test for now. I don’t have a sound chip yet, but it is running games and passes the RAM and VRAM tests that come included with the ATARIMAX cart.

 

I may just leave the PICO9918 installed and will have no reason to populate any VRAM or RF section components.

 

My only suggestion at this point would be to remove the solder mask from the PCB I/O port finger area in the gerbers. It is standard to remove all solder mask from PCB fingers for the best possible connection.

[Tekman]

Finished populating the board minus the speech chip. I have a chip coming from China and I'm crossing my fingers it will not be a fake.

 

Since I'm using the PICO9918 for VGA, I still have no plans to populate the RF and VRAM components.

 

Thanks for sharing your design!

[electro_sparkles]

On 11/25/2024 at 10:12 PM, Tekman said:

So far so good! I have the bare minimum of components installed to give it a quick test for now. I don’t have a sound chip yet, but it is running games and passes the RAM and VRAM tests that come included with the ATARIMAX cart.

 

I may just leave the PICO9918 installed and will have no reason to populate any VRAM or RF section components.

 

My only suggestion at this point would be to remove the solder mask from the PCB I/O port finger area in the gerbers. It is standard to remove all solder mask from PCB fingers for the best possible connection.

Hmm, I totally missed that in KiCad (solder mask). Only made these on my mill. I'll get on it. Thank you for the feedback, it's appreciated.

 

Also love the pics! 

 

Also Also, all sounds chips I've purchased from china have been ok so far. A few defects in the pile, but nothing fake.

[electro_sparkles]

Fixed the solder mask issue, updated version with new gerbers on github. Changed to version 1.0.2.F .