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Wanted to start a new thread for all updates rather than posting them to the poll topic.

 

I have received the prototype card today.  I will be doing a once over on it to make sure all is good (according to my schematics) then start populating it with components.

 

IMG_1498.thumb.JPG.f6b0dd99a658104b1452bff73b8babf9.JPG

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Put one complete together and made the wire runs for the errors I found, just a few.  there is 2 issues I have to chase.

 

1.  Does not detect the clock chip for some reason.  I'm using the same circuitry design I used for my RTC module for the original IDE card.  I have gone to a 3.3v version of the RTC and SRAM as the 5v version of the BQ4802 is pushing $20 USD each.  The 3v version is 1/3 the price.

2. Does not keep time, whatever you set it does not cycle the seconds, it just stays at what you set it.  Almost sounds like a crystal issue.

 

I think once I fix the clock chip not being detected by Fred's IDE DSR loader it will fix #2 as well.

 

on the upside, I have plugged in a Transcend 44pin 4 meg module as you can see in the photo and was able to detect it, partition the unit with 4 partitions and initialize each partition no problem.

 

Almost there!

 

built.thumb.jpg.4385b4aea95723629c6df7bdf74e4996.jpg

 

 

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2 hours ago, Kchula-Rrit said:

I'll take one, too.  Have yo set-up my Peripheral Box again.

The photo shows the chips in sockets.  Will they be socketed in the final product?

K-R.

Yes, there will be a choice for standard Dual Wipe sockets or machined sockets like I used on this board.

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2 hours ago, Switch1995 said:

I’ve already got two DSK solutions in my PEB (TIPI and Corcomp DSDD running real iron 5 1/4). Could I throw this into the mix in the same box??

I don't see why not... For me IDE storage is a good safe alternative. While TIPI storage works well, I've lost more than my share of files when the RPi inevitably crashes. This can be mitigated by frequent backups of the SD card, but one has to be very disciplined about it, which I am not.

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On 10/5/2023 at 2:54 PM, Switch1995 said:

I’ve already got two DSK solutions in my PEB (TIPI and Corcomp DSDD running real iron 5 1/4). Could I throw this into the mix in the same box??

Yes, you can throw it in the box.  I would disable DSK1 emulation on it since you have a FDC already.  Also you can select a range of CRU's on the IDE card so it will not interfere with any cards in the box.

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I found another error on the board, so I'm up to 5.  I have decided to make the entire board through-hole.  I have also made it compatible with any of my 838-RTC modules for the previous IDE board design.  So, this will allow someone to use an existing 838-RTC module for the clock.  I did have to swap a couple of address lines for the new through-hole 512k SRAM, but that was easy enough to do.

 

Here is the latest render.

 

final.thumb.png.c9d1f173cdbe3e6ba5841f886eb662ed.png

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  • 2 weeks later...

update...

 

I have received the latest prototype boards and I have put one together and it functions so far with no issues.  Currently I have only tested on the TI-99/4A, but will be testing on the Geneve soon.

 

Changes:

  • Fixed handful of connection errors
  • Converted to a 100% through hole design with a different SRAM (had to re-route a couple of signals as they are different than the original design)
  • The board now uses my 838 Clock module.  The one picture can use either the 3.3v or 5v version of the BQ4802.  The 3.3v is 1/3 of the price.

 

Please note, there are 2 connectors on the board.  You can only use one at a time.  If you need master/slave they need to be on the same connector.

 

Changes for production board:

 

  • I want to use a larger, thicker and better heatsink help with the heat generated on the 7805 regulator if I don't go with a V7805-1500R which is better for heat (no heatsink required) - will require some capacitor change for the power and will increase cost by around $12 for the board.
  • I will add ground planes.  Prototype did not have ground planes to make it easier if I needed to cut traces since there are quite a few signals on the board.

IMG_1524.thumb.JPG.838e8a9a04a194a7250133a947b5565e.JPG

 

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I want the board only and BOM only, I have practically every thing I need to populate it, using tooled sockets. I'm finishing up on that bareboard IDE card I bought from you awhile back, this week, working on it today. I'll use one of my Dallas Clock Srams on it. Here's what I got so far, need to wait for a few chips to come from Mouser now, that I couldn't find on Digikey, unless I bought hundreds or thousands. What would a production bare board run?

20231018_155318.jpg

Edited by RickyDean
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3 hours ago, RickyDean said:

I want the board only and BOM only, I have practically every thing I need to populate it, using tooled sockets. I'm finishing up on that bareboard IDE card I bought from you awhile back, this week, working on it today. I'll use one of my Dallas Clock Srams on it. Here's what I got so far, need to wait for a few chips to come from Mouser now, that I couldn't find on Digikey, unless I bought hundreds or thousands. What would a production bare board run?

 

Bare boards will be available for purchase.  the IDEv3 is designed around my 838-RTC module or an original BQ4847

Edited by Shift838
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4 hours ago, Shift838 said:

Currently I have only tested on the TI-99/4A, but will be testing on the Geneve soon.

Friendly reminder: Fred's latest DSR must be loaded for the card to work with the Geneve.  The partitions are managed by Fred's DSR and the Geneve OS leverages his sector IO routine >20 for all higher-level operations. 

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Oh Insane one @InsaneMultitasker, what is the max amount of partitions on 1 ide device and do they adhere to the 248mb limit that the Scsi has per partition? I know there is only master and slave, but can multiple partitions reside on 1 device, like say, a 1gb card having 4 partitions?

 

@Shift838, I do believe my Dallas chip will fit right in the 32 pin socket of the sram you show on the picture, so that shouldn't be an issue either. the Dallas is seen as a 512k sram. It can be turned on to become battery backed, and has a phantom clock integrated, access through programming.

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20 minutes ago, RickyDean said:

Oh Insane one @InsaneMultitasker, what is the max amount of partitions on 1 ide device and do they adhere to the 248mb limit that the Scsi has per partition? I know there is only master and slave, but can multiple partitions reside on 1 device, like say, a 1gb card having 4 partitions?

You'll have to check @F.G. Kaal's site but I believe his current DSR allows for four partitions per "drive", so a total of 8 partitions if using two drives.  The partitions adhere to the Myarc standard, so yes, 248MB per partition.

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Just to add some details, the 248 MiB limit is from the hard disk file system that is (more or less) commonly used for all hard disk drives in the TI family. It comes from the fact that allocation units may not span more than 16 sectors (with 256 bytes) and that the allocation table is located in sectors 1 to 31.

 

So you have 31 sectors with 256 bytes with 8 bits, each bit representing 16 sectors:

 

TotalSectors = 31 * 256 * 8 * 16 = 1015808 = 248*1024*4

SizeMiB = TotalSectors * 256 / 1024 / 1024 = 248

 

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I have installed a DC/DC Converter in place of the LM7805 voltage regulator.  Swapped out a couple of capacitors for the new design with the results below:

 

  • More stable 5v power output
  • much cooler

 

With LM7805 and heatsink after 2 minutes of powered up the regulator temperature ranges between 120 -130 degrees Fahrenheit.

 

With the new DC/DC Converter after 2 minutes of powered up the converter temperature ranges between 80 - 86 degrees Fahrenheit.

 

With that much of a difference in heat I believe it is worth using the DC/DC Converter over the standard LM7805 voltage regulator..

 

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19 hours ago, mizapf said:

Just to add some details, the 248 MiB limit is from the hard disk file system that is (more or less) commonly used for all hard disk drives in the TI family. It comes from the fact that allocation units may not span more than 16 sectors (with 256 bytes) and that the allocation table is located in sectors 1 to 31.

 

So you have 31 sectors with 256 bytes with 8 bits, each bit representing 16 sectors:

 

TotalSectors = 31 * 256 * 8 * 16 = 1015808 = 248*1024*4

SizeMiB = TotalSectors * 256 / 1024 / 1024 = 248

Does this mean that I can connect a 5GB hard disk and only use 1GB of it?  I have several IDE drives laying around that have a few gigabytes capacity, but would like to use the whole things.

K-R.

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Remember when FAT16 got too small for new hard disks? You had a 8 GiB drive and had to split it into four partitions, since no partition could become larger than 2 GiB.

 

The bad news is that we don't have an evolution of file systems on our TI, so it seems that we'll have to live with the 248 MiB limit.

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