Mini Colecovision

[electro_sparkles]

My main goal of the Righteous Tentacle Colecovision Reverse Engineering Project is to make a smaller version that is completely open source. I did not want any added functionality, just the standard Colecovision. The result is the Mini Colecovision (Sparkletron Colecovision), by taking all of the logic and putting it in a CPLD. Then using the TMS9118 VDP chip I was able to create a working Colecovision that is 5v only and 3.5 by 4.5 inches. 

 

What it is:

- Compatible with the base Colecovision.

- CPLD based architecture.

- Roller Controller/Standard Controller Compatible.

- 5V dc (0.5 amp with roller controller on same supply).

- On board JTAG header for easy programming

 

What it isn't:

- Expansion port compatible (it doesn't exist).

- HDMI/RGB/Svideo

 

Notes:

- Roller controller leads are not long enough to connect to both sides. Use an DB9 extender or remove the plastic clasp that keeps the cables from separating.

 

The CPLD is a MAX7000S chip, specifically the EPM7128SLC84-10. Why use it? Quartus 13.0sp1 is free to use and runs on Ubuntu 22.04 with the correct libraries. This allows the use of Verilog to describe the functional model for the glue logic. It has 5 volt IO and works well for this type of task. How do you obtain one? Well oddly enough Arrow has 13k of them in stock as of 3/23/24 (update, 3/24/24 they only show 12? No idea what's going on, but Arrows site is terrible) (also also they were from a company Arrow owns, when I find that info I'll update this post). They also have 5k of a slightly slower chip as of 3/24/24. Any speed should be fine, just change the target the Quartus settings.  Another part that will work is the Microchip ATF1508AS-10JU84. These can be used with Quartus by converting the POF with the Microchip POF2JED tool. The 7JX84 version will also work, but I haven't looked into it (ATF to MAX is 15=15, 10=10, 7=7 ns). JTAG programming of the part was tested with a generic Altera USB blaster (Chinese uC clone) using the built in JTAG header.

 

With all of these options for the MAX, I felt that this part could be used, and others would be able to build it easily and cheaply (CPLD is less than $20, around $12 usually).

 

The TMS9118 was selected since it only uses 2 ram chips, is composite out (less circuitry) and has a 3.56 Mhz clock output. This clock is used by the system globally.

 

Documentation is a work in progress. Eventually there will be a wiki with build notes and a BOM on the git repo.

 

This is a 100% open source MIT licensed project.

 

Update: Found the company Arrow owns who seems to actually have these chips LINK. Oddly enough they don't show the original chip in stock at the moment either (not sure how the heck they sold 13K in a day, maybe they sent them to me on my last order from the day prior j/k).

 

Pictures of the project (slight changes to the board have been made, but its 99% the same as this one) attached below.

Bodge caps have proper homes on the final version.

Edited March 24 by electro_sparkles
grammer update v2

[electro_sparkles]

Quick update

 

I have added prebuilt binaries for the following CPLDs in the src/quartus13sp01/bin folder.

-------------------------------------------------------------------------------------------------

FILE - TARGET (STATUS)

-------------------------------------------------------------------------------------------------

portable_coleco_ATF1508-10.jed  - ATF1508AS-10JU84 (UNTESTED)

portable_coleco_ATF1508-15.jed - ATF1508AS-15JI84 (UNTESTED)

portable_coleco_ATF1508-7.jed  - ATF1508AS-7JX84 (UNTESTED)

portable_coleco_MAX7128SLC-10.pof  - MAX7128SLC-10 (TESTED)

portable_coleco_MAX7128SLC-15.pof  - MAX7128SLC-15 (UNTESTED)

portable_coleco_MAX7128SLC-7.pof - MAX7128SLC-7 (UNTESTED)

-------------------------------------------------------------------------------------------------

 

Thats 6 different parts that are supported and will work, but most are untested. This has been tested with the MAX7128SLC-10 at the moment. Will test the rest soon.

 

The MAX is programmable using Quartus v13.0 sp1.

The ATF is programmable using openocd. An example ocd config file is here.

Both use the Altera blaster for programming.
 

[+evg2000]

 nice compact design. what’s in the bottom right corner?  looks like a volume pot. 

[Jess Ragan]

Any plans for Super Game Module support? I know you said there wasn't an expansion port, but could that functionality be baked into the hardware?

[electro_sparkles]

9 hours ago, evg2000 said:

 nice compact design. what’s in the bottom right corner?  looks like a volume pot. 

Yes it is, the main design goal is to make a portable Gameboy version of the Colecovision. The opamp is a lm389 (meh) for driving a small speaker directly. This can be used for line level audio with the correct selection of resistors at the output.

 

I didn't state in the main post, sorry about that.

7 hours ago, Jess Ragan said:

Any plans for Super Game Module support? I know you said there wasn't an expansion port, but could that functionality be baked into the hardware?

No plans for support, I wanted this to be a standard Colecovision.

 

Could it be added? Sure, I put all the address lines to the CPLD, and the firmware Verilog source is MIT licensed. Anybody can change it and add features. 

 

It does use a 2k RAM chip with the upper address pin tied to ground. I did route the address line to it so it can be changed giving 2K RAM to device instead of 1K.

 

 

[leaded solder]

This is super cool. Good luck with making the portable version!

[electro_sparkles]

18 hours ago, leaded solder said:

This is super cool. Good luck with making the portable version!

Thanks! Your journey making your board was an interesting read. 

 

@leaded solder Actually would you like a board? I have few extras of a version that do work but needs some bodge caps. 

 

Progress update.

 

I've decided to add super game module capabilities (SGM) to the final version.

 

I did expand the length from 4.5 inches to 5.6 inches (original gameboy size).

 

Routing is complete for the new parts, which are as follows.

-AS6C62256-55PCN, 32K SRAM (upgrade from 2k)

-YMZ284, AY-3-8910 compatible sound chip.

 

Tested a new power pack solution from Adafruit (I don't feel like designing the battery section). This works well and powers both the LCD screen, and mini Colecovision board. 10Ah battery should last more than long enough (Approx 13 hours @ 750mA).

 

By the end of the week, I should have the 3D render ready to show off. 

 

Git repo will get a push by then. I'm going to tag the current version to make it available for those who want to build a standard mini Colecovision.

 

Issues? Only one I can think of is the use of the YMZ284. It does not allow for reads of the registers like the AY-3-8910. Does anyone know of a SGM game that reads the registers? I created a cache reg of the last write to hopefully deal with it, but there are not enough resources on the CPLD to cache all of them at the moment.

 

New board will probably get sent out to JLCPCB by the end of May, testing in June, waiting to get some other projects done for one large order.

 

Todo: Testing, and all the mechanical stuff, 3D printed case and such. Then documentation, which I'll probably do first cause the mechanical part is going to be a pain.

 

Code changes to the CPLD are as follows, pending future fixes and simplifications (sections of code copy pasta, pieces missing):

  //****************************************************************************
  /// RAM Output enable when read is requested.
  //****************************************************************************
  assign s_ram_csn = (s_y0_seln | r_swap_ena[1]) & (s_ram2_csn  | ~r_24k_ena[0]) & (s_ram1_csn | ~r_24k_ena[0]) & s_ram0_csn;

  assign RAM_OEn = RDn | s_ram_csn;
  assign RAM_CSn = s_ram_csn;

  //****************************************************************************
  // Disable BIOS ROM when requested and use ram instead.
  //****************************************************************************
  assign ROM_ENABLEn = (s_y0_seln | ~r_swap_ena[1]);

  //****************************************************************************
  /// decoder for address selection.
  /// No clock, based on AND from TI 74138 datasheet.
  //****************************************************************************

  //AUX_DECODE always 1, RFSH is a double inversion on coleco (inverter + 138 internal)
  assign s_enable_u5 = (RFSHn & ~MREQn);

  assign s_y0_seln      = ~(s_enable_u5 & ~A[15] & ~A[14] & ~A[13]); //Y0
  assign s_ram2_csn     = ~(s_enable_u5 & ~A[15] & ~A[14] &  A[13]); //Y1
  assign s_ram1_csn     = ~(s_enable_u5 & ~A[15] &  A[14] & ~A[13]); //Y2
  assign s_ram0_csn     = ~(s_enable_u5 & ~A[15] &  A[14] &  A[13]); //Y3
  
  
  //****************************************************************************
  /// decoder for super game module
  //****************************************************************************

  assign AS             = (A[7:0] == 8'h50 & ~IORQn & ~WRn ? 1'b0 : 1'b1);
  //TODO simp logic below
  assign AY_SND_ENABLEn = ((A[7:0] == 8'h50 | A[7:0] == 8'h51) & ~IORQn & ~WRn ? 1'b0 : 1'b1);
  assign D              = (A[7:0] == 8'h52 & ~IORQn & WRn ? r_snd_cache : 1'bz);

  //IO registers
  //This logic is registered
  always @(negedge clk)
  begin
    r_24k_ena   <= r_24k_ena;
    r_swap_ena  <= r_swap_ena;
    r_snd_cache <= r_snd_cache;

    if(~IORQn & ~WRn)
    begin
      case (A[7:0])
        // on write to sound chip, cache data.
        8'h51: r_snd_cache <= D;
        //exapand ram to 24k by setting bit 0 to 1
        8'h53: r_24k_ena  <= D;
        //swap out bios for ram by setting bit 1 to 0
        8'h7F: r_swap_ena <= D;
        default:
        begin
        end
      endcase
    end
  end

 

Edited April 20 by electro_sparkles
text issues

[+mytek]

Nice project. First of all I gotta say you out did me on the smallness factor for sure. That first version board is so small and cute, plus it looks fairly simple circuitry-wise 👍

 

On 4/20/2024 at 10:43 AM, electro_sparkles said:

I've decided to add super game module capabilities (SGM) to the final version.

I don't know if this helps or not, but here's what I did for SGM capability...

Protel CPLD Schematic CV-NUC+MSX V1.5.pdf

MSX_mmu_V1.5.pld

Although it looks like you already have a handle on it.

 

I did run into an issue with my implementation where some physical SGM carts didn't see a valid SGM. However those same games when run as a digital download on an AtariMax Ultimate SD cart worked just fine.

 

On 4/20/2024 at 10:43 AM, electro_sparkles said:

I did expand the length from 4.5 inches to 5.6 inches (original gameboy size).

Aww you're now getting closer to my board footprint. Adding features tends to do this

 

On 4/20/2024 at 10:43 AM, electro_sparkles said:

Issues? Only one I can think of is the use of the YMZ284. It does not allow for reads of the registers like the AY-3-8910. Does anyone know of a SGM game that reads the registers?

I too tried using that chip, but it failed to work with virtually every SGM game I threw at it. Too bad since it drastically reduces the size required.

[electro_sparkles]

6 hours ago, mytek said:

I too tried using that chip, but it failed to work with virtually every SGM game I threw at it. Too bad since it drastically reduces the size required

Hmm, so they are checking. So did you see my idea of caching the last write? It may fix that. This is very helpful info, and now I know the hell I'm about to deal with.

 

All that is awesome stuff you've posted. I'll have to take a look at your code soon(tm). I did push a few fixes to mine above that make it a bit cleaner.

 

Also made a branch of the original smaller version in this post, so it is saved. That way people can make the SGM version or the all original.

 

All new progress is in the master branch.

 

Again thanks for the compliments and look forward to checking out your project.

 

*Future* looked over the pld code. Do any games really need 1k mirroring? I get it, just wondering what known games may have an issue if it's not implemented.

Edited April 22 by electro_sparkles
Added comment

[+mytek]

3 hours ago, electro_sparkles said:

Do any games really need 1k mirroring? I get it, just wondering what known games may have an issue if it's not implemented.

I think there were a few, but you're right in assuming this wouldn't be much of an issue. Most likely you can just leave the 32K RAM as always active, and the SGM games will work just fine, as well as most of the others. It just ends up looking more like an Adam.

[+mytek]

16 hours ago, electro_sparkles said:

Hmm, so they are checking. So did you see my idea of caching the last write? It may fix that.

I missed this question.

 

Assuming the check is only made once upon SGM initialization, your plan seems like it should work. Actually that's pretty ingenious 👍

[electro_sparkles]

Finally, 3D renders of the boards.

Untested version pushed to github repo.

Edited May 1 by electro_sparkles
github

[electro_sparkles]

Update:

 

All YMZ284 sound chips tested. https://github.com/sparkletron/PICerino_YMZ284

 

New board sent to JLCPCB for production. Only a small batch of 5 for testing and finding bugs in all of the new changes.

[electro_sparkles]

Updates on revised board testing:

• Original games work
• Adafruit battery power option works well
• Roller controller now works without issue.
• Issues...
  • Audio is noisy, changing to a new part and power supply isolation method.
  • No super game to test with... need to make a cart.

Issues Fixed:

• Audio port placement

Testing to finish:

• Super game module
• Built in controller vs external controller switching
• Audio amp with isolation upgrade

 

Summer will keep progress slow, but it is still moving along. Once the hardware is done the case will be next.

 

[killersquirel]

This looks awesome. Are you planning on selling these?

[electro_sparkles]

On 7/17/2024 at 4:24 AM, killersquirel said:

This looks awesome. Are you planning on selling these?

No, this will be an open source project with a BOM. Its already on github per the initial post. Current state is working, but the audio sucks and the Super Game Module stuff is untested... along with needing major bug testing.

[electro_sparkles]

Finally, an update.

 

Final version of board completed.

-4 layer pcb for better ground plane.

-Super Game Module Built in, and tested with 32k games

-Internal/External controller switch added and fixed.

-New audio amp tested and works well

-PI noise filters help, isn't perfect, but is at least better for audio.

-Roller controller tested and works.

-Power solution (adafruit controller/battery) tested and works well.

 

 

 

 

What's left to do?

-Design a 3D printed case

-Design a 90-degree cart adapter. 

-Instructions

 

Timetable? Fall/Winter probably end of 2024 completion date.

 

 

 

 

Edited 22 hours ago by electro_sparkles

[N0mi]

That is so awesome! Great work! 😀

[Jess Ragan]

Maybe this has already been answered, but can this be used as a replacement for a ColecoVision PCB? Could it be mounted in a ColecoVision shell? Because unless it's savagely expensive, it would probably be a better option than sending my ColecoVision out to be repaired.

[electro_sparkles]

2 hours ago, Jess Ragan said:

Maybe this has already been answered, but can this be used as a replacement for a ColecoVision PCB? Could it be mounted in a ColecoVision shell? Because unless it's savagely expensive, it would probably be a better option than sending my ColecoVision out to be repaired.

Actually I have a full PCB for the original colecovision. 

 

https://github.com/sparkletron/righteous_tentacle_colecovision

 

It even has a parts list for all of the new parts needed.