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where can you learn the commands of mad-asm please?


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Hello, good day, where can you please find help with these commands from mad-asm?

Thanks.
greeting

 

Dostępne nielegalne rozkazy 6502

ASO   RLN   LSE   RRD   SAX   LAX   DCP   ISB
ANC   ALR   ARR   ANE   ANX   SBX   LAS   SHA
SHS   SHX   SHY   NPO   CIM

Dostępne rozkazy 65816

Oczywiście dostępne są rozkazy 6502, a oprócz nich:

STZ   SEP   REP   TRB   TSB   BRA   COP   MVN
MVP   PEA   PHB   PHD   PHK   PHX   PHY   PLB
PLD   PLX   PLY   RTL   STP   TCD   TCS   TDC
TSC   TXY   TYX   WAI   WDM   XBA   XCE   INA
DEA   BRL   JSL   JML
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The second bunch look to be extra instructions included with the 65816 CPU, though some of them such as STZ and BRA also appear on the 65C02.

 

The first bunch are unsupported 502 instructions.  They are documented in various places, some are useful and others not so much.

 

Also, note that the unsupported instructions (I think all of them) don't work on a 65C02 or 65816.

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i think this could be a helpful overview

https://codebase64.org/lib/exe/fetch.php?media=base:nomoresecrets-nmos6510unintendedopcodes-20202412.pdf

 

they write

Quote

To make things simple, the rest of this document refers specifically to the MOS6510 (and the CSG8500) in the Commodore 64, and to the CSG8502 found in the Commodore 128. However, most of the document applies to MOS6502 as well. Also MOS Technology licensed Rockwell and Synertek to second source the 6502 microprocessor and support components, meaning they used the same masks for manufacturing, so their chips should behave (exactly) the same. The 6502C “Sandy” found in Atari 8-bit computers also seems to work the same.

there are also some links in this document.

 

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48 minutes ago, Rybags said:

The second bunch look to be extra instructions included with the 65816 CPU, though some of them such as STZ and BRA also appear on the 65C02.

 

The first bunch are unsupported 502 instructions.  They are documented in various places, some are useful and others not so much.

straight out of MADS documentation, once you figure them out it's easy to implement any of them

as Macro's if need be.

 

for example, I use BRA as a macro (and some others), where I don't use the overflow flag

; simulated unconditional branch
BRA    .macro branch ; always branch
        CLV
        BVC :branch
        .endm

 


6502 illegal orders available
   ASO RLN LSE RRD SAX LAX DCP ISB
   ANC ALR ARR ANE ANX SBX LAS SHA
   SHS SHX SHY NPO CIM


65816 orders available
Of course, orders 6502 are available , and in addition to them:
   STZ SEP REP TRB TSB BRA COP MVN  
   MVP PEA PHB PHD PHK PHX PHY PLB  
   PLD PLX PLY RTL STP TCD TCS TDC  
   TSC TXY TYX WAI WDM XBA XCE INA
   DEA BRL JSL JML

 

Of course, orders 6502 are available , and in addition to them:




			
				


	Edited  by TGB1718
	
	

			
		
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Posted (edited)

hello thanks for help.

 

the asm works, but can't find the stz.

I play with the x16 emulator.

 

thanks

grerting.

 

asm
    phy
    stz VERA_ctrl
    lda bank
    sta VERA_addr_bank
    lda addr
    sta VERA_addr_low
    lda addr+1
    sta VERA_addr_high
    ldy value
    sty VERA_data0
    ply
end;

Edited by neuling
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You have to set the processor in MADS Preferences:- see below from WUDSN IDE

 

image.thumb.png.a574d7c448d40cd3a600d8d8035605f7.png

 

You also have to put an option (OPT) to tell the compiler what CPU it's for in your code:-

 

 OPT
The OPT pseudo command allows you to enable/disable additional options during assembly.
b+ bank sensitive on
 b-bank sensitive off (default)
 c+ enables support for CPU 65816 (16bit)
 c- enables CPU 6502 (8bit) support (default)

 f+ result file in the form of one block (useful for cart)
 f - result file in block form (default)
 h+ writes file header for DOS (default)
 h- does not save file header for DOS
 l+ writes listing to file (LST)
 l- does not save listing (LST) (default)
 m+ saves entire macros in the listing
 m - saves in the listing only the part of the macro that is executed (default)
 o+ writes the assembly result to the output file (OBX) (default)
 o- does not write the assembly result to the output file (OBX)
 r+ code length optimization for MVA, MVX, MVY, MWA, MWX, MWY
 r- without code length optimization for MVA, MVX, MVY, MWA, MWX, MWY (default)
 s+ prints the listing on the screen
 s- does not print the listing on the screen (default)
 t+ track SEP REP on (CPU 65816)
 t-track SEP REP off (CPU 65816) (default)
 ?+ labels with '?' at first they are local (MAE style)
 ?- labels with '?' at the beginning they are temporary (default)

Edited by TGB1718
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