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Was the TI99/4A - 2nd VDP ready?


Artoj

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Hi All,

As I am cleaning up my projects, I had discovered that there was a unknown bunch of pads between the VDP and the TMS9901, so I investigated. Here are my findings, can anyone else elaborate or even corroborate my idea that TI was thinking of adding a interface to a second VDP on the standard motherboard? Regards Arto.

 

VDP TMS9929

-----------

PIN 11    Output    R/W#

VRAM write strobe

 

PIN 34    Input    RESET#     (RESET#/SYNC)

The RESET# pin is a tri-level input pin. 
When it is below 0.8 volts, RESET# 
initialises the VDP. When it is above
9 volts, RESET# is the synchronising
input for external video.

 

PIN 37    Output    GROMCLK

VDP output clock - XTAL/24
Typically not used.


DRAM TMS4116

------------

PIN 3    Input    WE#     (R/W#)

WE#   = 1 =  Read
             Data input is disabled

WE#   = 0 =  Write
             Prior to CAS#, data out
             will remain in the high
             impedance state for the
             entire cycle, permitting
             common I/O operation.

 

 

 

VDPx2-ww3.jpg

VDPx2SCHEM3.jpg

Edited by Artoj
Mistake
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It's related I think for when it was TMS9918 before the A version, not sure what else it could have been.

 

As for a second VDP, yes there is partial support on the 4A to have ext. Video in.

 

I have the docs for multiple vdp setup. I will scan them in and share it later on this week.

 

But I sure that empty socket was for older non A versions of the VDP, but not layed out like the actual 4 motherboard, as shown in the pictures shared, so it is strange.

Edited by Gary from OPA
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Yo! It might have been a revision, still the RESET#/SYNC was pulled out, this indicates a dual Video possibility. I figured it was an Inverter, but you never know. Thanks for the responses, I still liked the idea though, regards Arto.  

VDPx2SCHEM4.jpg

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22 minutes ago, Artoj said:

Yo! It might have been a revision, still the RESET#/SYNC was pulled out, this indicates a dual Video possibility. I figured it was an Inverter, but you never know. Thanks for the responses, I still liked the idea though, regards Arto.  

VDPx2SCHEM4.jpg

Yes, dual vdp might had been in the works. The video jack has an option for video in as well.

 

I will scan in the dual vdp docs fully later on on how it works. I posted some quick screenshots before of the technical manual, but it needs a proper full flatbed scanner job as it has source code examples as well. Maybe from that you can figure out if possible on the 4a motherboard as is after I share all the information, I am on phone at the moment so I will just quickly reshare the screenshots I took before.

 

Of course now we need to simulate this feature via dual pico9918 instead.

 

It is the whole point why we have transparent color on the 9918, as when a pixel is transparent it shows what is from other vdp or video in.

PXL_20240717_211450187.jpg

PXL_20240717_211503031.jpg

PXL_20240717_211511357.jpg

PXL_20240717_211526850.jpg

PXL_20240717_211539969.jpg

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1 hour ago, Gary from OPA said:

Of course now we need to simulate this feature via dual pico9918 instead.

 

It is the whole point why we have transparent color on the 9918, as when a pixel is transparent it shows what is from other vdp or video in.

Exactly as I thought, these guys were smart cookies, they always left the door open for guys like us to take a peek LOL. I think the dual Pico9918 sounds interesting, let's see where this takes us, regards Arto.

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1 hour ago, Artoj said:

Exactly as I thought, these guys were smart cookies, they always left the door open for guys like us to take a peek LOL. I think the dual Pico9918 sounds interesting, let's see where this takes us, regards Arto.

I had some spare time, so I quickly placed the Dual Video Display Processor Application Report September 1984 Revision A SPPA005A into my flatbed scanner, and I have attached it here for all to enjoy reading, now we just need to code up a test program and customized a /4A motherboard.

 

In the example sample code included they use a 9995 with the twin 9928's at ports A000 and C000 (as it is simpler bus interface compared to the 16-bit 9900 with the special need to separate read and write ports, due to the always "read before write" function, but we can easy enough have the primary VDP at 8800/8C00 and the secondary VDP at 8A00/8E00.

 

Love to see how we can do this by using two dual PICO9918, and merging their two VGA outputs to produce one output signal.

 

 

Dual-VDP.pdf

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6 hours ago, Gary from OPA said:

Love to see how we can do this by using two dual PICO9918, and merging their two VGA outputs to produce one output signal.

Does it have enough horsepower to pretend to be two VDPs?

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36 minutes ago, OLD CS1 said:

Does it have enough horsepower to pretend to be two VDPs?

Most likely not. But no reason we could have two picos stacked together, but the trick is merging the two outputs, there would have to be a new way to interface the two together being a vga output not a composite video like in ti99 original idea. Maybe the pico2 could do it, simulate two VDP's together on one chip. But first I rather see the v9938 support added to the pico, then we can talk about dual v9938 instead as that is possible with original silicon as well on the v9938 when using composite video.

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15 hours ago, Artoj said:

VDPx2SCHEM4.jpg

Don't believe the 7404, will get any power through C132 though. The 99/4 schematic, shows C132(.01) to be across U101. The +12v connection in your diagram, looks more like GND. in the pic.8)

 

Curious, where you found the C300, identifier? I can't find it on any schematic. On other components, like the SND. chip, the power comes in through the coil.

 

Say, what are the four buffers doing anyhow?:ponder:

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Posted (edited)
25 minutes ago, HOME AUTOMATION said:

Don't believe the 7404, will get any power through C132 though.

This is why I was confused, the 7404 would not work, even though your schematic shows it as such? I will double check, but this is why I thought it might have been used for something else. As you can see the +12v that is used by the TMS4116 on pin 8 is connected to the C132 via a soldered plane, which is not the same as your schematic. C300 is shown in page 21 from the SAMS PDF. These are the reasons I though it was more of an interface than just a 7404. Regards Arto. 

Edited by Artoj
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18 hours ago, Artoj said:

PIN 34    Input    RESET#     (RESET#/SYNC)

The RESET# pin is a tri-level input pin. 
When it is below 0.8 volts, RESET# 
initialises the VDP. When it is above
9 volts, RESET# is the synchronising
input for external video.

Now we can see that a +5v or ground will not power a 9V signal, this is another reason that this was not just a 7404. I think it was used on the board in your pic as such, but was changed in my board. I am guessing they were anticipating more than we envisage. Regards Arto

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39 minutes ago, Artoj said:

Well it looks like I missed a connection and got the polarity wrong, my bad, still it completes the missing circuit. Regards Arto.

 

VDPx2SCHEM5.jpg

Only problem is RW is an outlet from the VDP do why would it be going to pin 2 as that is output as well, not logical if it is the 04 chip.

 

It has to be a chip where pin 2 is input and pin 9 is an output if it makes any sense, based on your drawing of the signals.

 

In the original old non A schematic you can see the delay circuit has pin 9 as the input from the VDP and pin 2 as output to RAM.

Screenshot_20240822-095815.png

Edited by Gary from OPA
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Posted (edited)
1 hour ago, Gary from OPA said:

Only problem is RW is an outlet from the VDP do why would it be going to pin 2 as that is output as well, not logical if it is the 04 chip.

Thanks Gary, this was the reason I did not show any internals on my first drawing, only the link made sense, so either somebody at TI messed up or there was something else, I originally thought it was a 7404 then a 7474, then I started looking at the 4000 chips, now I am not so sure what was there, if the inverters were ass about then it would make sense. Only a 4049 fits that description but pins are not correct and it is a 16 pin chip anyway. So this set of pads could be used as a pin header for another project, as the GROMCLK, RESET#/SYNC and the R/W# are now exposed, where as the WE# from the Dram is also exposed, possibly to access and different bank of DRAM from a second VDP. The only extra pin needed is pin 35 from the VDP to get external video. 

 

As I was writing this, I realised the drawing from Home Automation has the pin-outs and the chip name, so we are looking at a TI bodge that renders using a 7404 useless. Here is the final discovery, after having this mother board for 40 years, I found something interesting that TI had done to shave costs. Route and Link and nobody would be the wiser. Regards Arto.   

VDPx2SCHEM6.jpg

Edited by Artoj
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1 hour ago, Artoj said:

Thanks Gary, this was the reason I did not show any internals on my first drawing, only the link made sense, so either somebody at TI messed up or there was something else, I originally thought it was a 7404 then a 7474, then I started looking at the 4000 chips, now I am not so sure what was there, if the inverters were ass about then it would make sense. Only a 4049 fits that description but pins are not correct and it is a 16 pin chip anyway. So this set of pads could be used as a pin header for another project, as the GROMCLK, RESET#/SYNC and the R/W# are now exposed, where as the WE# from the Dram is also exposed, possibly to access and different bank of DRAM from a second VDP. The only extra pin needed is pin 35 from the VDP to get external video. 

 

As I was writing this, I realised the drawing from Home Automation has the pin-outs and the chip name, so we are looking at a TI bodge that renders using a 7404 useless. Here is the final discovery, after having this mother board for 40 years, I found something interesting that TI had done to shave costs. Route and Link and nobody would be the wiser. Regards Arto.   

VDPx2SCHEM6.jpg

It is tough to say really what happened. As originally the 04 was only needed on the earlier non A versions of the ti99. Once the tms9918a arrived, that delay circuit was no longer needed.

 

I also find it weird there is 12volts, and the fact reset goes to it, and gromclk there as well as there was no need for all that on the non A design.

 

As for the ext. video if you look on the ntsc version ones using 9918 there is jumper to allow that pin 35 to be visible on the video DIN plug.

 

But now for that to work fully there also needs to be circuits to pull the reset line to 9 volts during the sync part, maybe that is what this missing chip would had been doing.

 

Attached below is some of the released documents from Karl about ext. video.

 

More information and documents on the ext. video feature being discussed a few years back here:

 

198x_External_Video_by_KG.pdf 198x_External_Video_by_Pete_Macourek.pdf 1982_TI_Europe_Proposal_for_9929A_Improvements_(inc._External_Video).pdf

Edited by Gary from OPA
documents and added link to old thread.
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  • 3 weeks later...

These schematics are nonsensical.  For one thing, they show inputs connected to inputs and outputs connected to outputs.  I've followed all the traces and found that it is VERY easy on some of them to jump traces.  Therefore I have ohmed everything out and have come up with this.

 

1. The node indicated variably as -12V and+12V turned out to be a ground connection.  Home Automation pointed that out earlier.  That capacitor, C132, coupled to inductor L404, which in turn is connected to ground through C300, makes up a nice high frequency trap on the 5V supply to this 7404.

2. Pin 11 of the 9918A/29A, a R/W* output, is connected to pin 9 of the U101 pads, an input.  Pin 3 of the 4116s, an input, was formerly showed in this position.  I've moved pin 3 of the 4116s, a R/W* input, to the opposite end, to be connected to pin 2 of of U101, the output of the 4 element inverter chain.  In the absence of the 7404, W100 must be installed to create a bypass connecting pin 11 of the VDP to pin 3 of the 4116s.

3. Pin 34 of the VDP, a RESET/SYNC input, does not connect to the 7404, but its trace passes between pins 3 and 4.  I've verified that it is connected to U600 pin 6, U601 pin 4 and U300 pin 1, all of which are RESET inputs.

4. Pin 37 of the VDP, the GROM clock output, is connected to pin 3 of U101, an input.  The corresponding output on pin 4 goes out to pin 13 of each of the GROMs, to pin 14 of the 76494 sound chip, and pin 27 of the command module connector.  In the absence of the 7404 a bypass jumper wire ties the "A" version VDPs to these devices by shorting pin pads 3 and 4 together.

 

 

VDP-TMS9918-TMS9918A-TMS9929.TI99-4.jpg

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On 8/23/2024 at 1:18 AM, Artoj said:

so we are looking at a TI bodge that renders using a 7404 useless

As I said,, they made a change in the TMS VDP and by-passed the use of the 7404 chip, I think someone in production pointed out a simple fix, just by routing around it, leaving a fingerprint of what was used in a previous iteration without changing the production too much. So it is a Ghost 7404 from Inversion zone in Bizzaro Instruments that would never be used, which they did not make in our dimension. LOL    

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This all just makes it possible for a TMS9918 to be used in place of the intended TMS9918A, just in case you need to replace it but only have a TMS9918, perhaps?  It also leaves a convenient means to introduce an alternate GROM clock.

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