Bennet Posted May 24, 2006 Share Posted May 24, 2006 Does anyone have a chart that shows exactly when Antic does DMA for every type of graphics mode and every HSCROL value? Basically a 114 cycle graph showing the instruction, address, player, missile, graphics, characters, and memory refresh DMA locations. I started to make one based on information in the hardware documents I could find and by running many DLIs that change colors on different cycles to see where they are delayed. It was initially a lot harder than I thought because things don't work the way you'd assume by reading the documentation. But... they are working the way I'd expect if I actually had to build the hardware (pipeline delays, etc). So if anyone is curious about my findings I'd be happy to share. There's a lot more to the Antic chip than meets the eye. Quote Link to comment Share on other sites More sharing options...
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