Raving Vieprz Demo

[+JAC!]

Hi,

 

does anybody have a working version of this?

 

http://a8.fandal.cz/detail.php?files_id=818

 

Crashes on Altirra, black screen in Atari800Win.

 

Cheers, JAC!

[Mclaneinc]

Does not crash on Altirra 2.5 final but not playing properly, you get the title pic and then the screen flashes and music plays.. (Perhaps that is what you meant by 'crash'..?)

 

Tried all the version I have, all the same...

 

Broken or not emulated correctly??

Edited July 27, 2014 by Mclaneinc

[bob_er]

My version works fine on real hardware.

[Mclaneinc]

My version works fine on real hardware.

 

In that case...Phaeron!!

 

Demo's are always going to be the real test of emulation accuracy / all the little tricks..

 

One guy is testing all the demo's for the Amiga on WinUAE, the author says the quality of emulation has rose greatly because of this testing & fixing, so its all good.

[NML32]

I tried it on the A8 FPGA in PAL mode and the sound and video played. During some of the video playback the screen flashed white. Is this normal?

[Xuel]

The demo enables interrupts before writing the code that the interrupts call. It must happen to finish writing the code before the display list interrupt on real hardware but the interrupt happens too soon on Altirra. Here's a patch:

 

raving.zip

 

I just swapped the order of the memory write and the NMIEN write in this sequence:

 

203B: A9 C0             LDA #$C0
203D: 8D 0E D4          STA NMIEN    [$D40E]
2040: A9 FF             LDA #$FF
2042: 8D FF FF          STA $FFFF    [$FFFF]
2045: A9 00             LDA #$00
2047: A2 00             LDX #$00
2049: 9D 00 C0  L2049   STA $C000,X  [$C062]
204C: E8                INX
204D: D0 FA             BNE $2049
204F: EE 4B 20          INC $204B    [$204B] = $C0
2052: AD 4B 20          LDA $204B    [$204B] = $C0
2055: C9 D0             CMP #$D0
2057: D0 EC             BNE $2045

EDIT: vblank interrupt -> display list interrupt

Edited July 27, 2014 by Xuel

[Mclaneinc]

Nice one Xuel, thank you..

 

Hopefully Avery can re-jig Altirra

[foft]

I tried it on the A8 FPGA in PAL mode and the sound and video played. During some of the video playback the screen flashed white. Is this normal?

 

Yes, just checked on old hardware. Works the same:-)

[Xuel]

I don't think it's really Altirra's fault. It probably will fail occasionally even on real hardware as the timing is dependent on when the load from disk/IDE/tape/whatever finishes. It just happens to finish instantly in Altirra when you load the .XEX directly. I actually got it work just fine booting from DOS in Altirra with SIO patch disabled.

[Mclaneinc]

Ah, so there are other variables in there...

 

I only mention it to be checked by Avery as the xex works directly without any subtle changes to make it work hence a look at Altirra seems worthwhile..

[+CharlieChaplin]

Hmm,

 

tested Xuel`s update of the demo and err, on the 90k ATR-image the demo has approx. 584 sectors, but when I boot/load it with Atari 800 Win it stops after approx. 380-390 sectors, shows some demo stuff but does not continue loading the rest...

 

With Altirra however, Xuel`s update continues loading and shows the rest of the demo (credits, greetings and other stuff). On my real A8 and 1050 floppy the demo always worked fine. (Maybe you do not know, there was a pre/party version of Raving Vierpz that did not contain the credits part; the final version with credits had been released after the party.)

[phaeron]

Xuel's analysis is good, but there's a bit more to it than that.

 

The real problem is not when the load finishes but how long it takes. What the demo is doing is that it shuts off the display by writing $00 to SDMCTL and then returns to DOS, which then loads additional segments on top of the active display list. This always happens to work when doing a normal EXE load through DOS, either on real hardware or on an emulator, because:

• Enough time is spent in DOS outside of SIO for the stage 2 VBI handler to run and copy SDMCTL to DMACTL.
• DMACTL is cleared in VBLANK, ensuring that the DLI bit is not left set in ANTIC IR.
• If by some chance DOS copies fast enough to overwrite the display list before stage 2 VBI can shut it off, it's possible for the trashed display list to set the DLI bit in NMIEN, which isn't affected by clearing DMACTL. This isn't a problem because the next VBI will reset the DLI bit when it does an STA NMIRES.
• This means that by the time the next init segment runs, its out of order DLI init doesn't matter because the display list is off and the DLI bit is cleared.

So, basically, this demo is relying on something it shouldn't, but it's only a problem because of the emulator's ability to instantly load. Since the demo is relying on stage 2 VBLANK, it's very unlikely but possible for this to be tripped on a different DOS on real hardware. A really fast 65C816 running off of a ramdisk could hit it, too.

 

I can think of a couple of ways to fix this in the emulator. One would be to postpone running an init segment until a VBI has been run. The other way would be to have the loader check for and handle an SDMCTL change.

[Xuel]

Phaeron, good point. I have been bitten by this problem in my own code as well so I've taken to waiting for VBLANK between writes to shadow registers and returning to the loader. For example:

 

  ; do stuff that VBLANK needs to act on
  mva #0 559
  ; wait for VBLANK
  lda RTCLOK+2
wait
  cmp RTCLOCK+2
  beq wait
  ; return to loader
  rts

Here's the demo again with that patch instead of the one I applied earlier:

 

raving2.zip

[Heaven/TQA]

Phoeron... would not help a "variable" "weakup time" of Altirra? same with reading 53770 (random) as I run in it earlier? (with instant load I always get same random number).

[Bryan]

I don't think it's really Altirra's fault. It probably will fail occasionally even on real hardware as the timing is dependent on when the load from disk/IDE/tape/whatever finishes. It just happens to finish instantly in Altirra when you load the .XEX directly. I actually got it work just fine booting from DOS in Altirra with SIO patch disabled.

People sometimes have the opposite problem. The code works in the emulator and it breaks when it's tested on real hardware and it has to start from a different point in the scan.

[phaeron]

Phoeron... would not help a "variable" "weakup time" of Altirra? same with reading 53770 (random) as I run in it earlier? (with instant load I always get same random number).

 

Not a good idea in this case. Here we specifically need at least one VBI to run without an IRQ below it, so stage 2 VBI executes.