2x and 4x colour clock modes on the 800 fpga core

[xxl]

11 hours ago, HiassofT said:

@xxl You could try if you can squeeze out a few more MIPS by using undocumented opcodes in sysinfo

direct such requests to the author of the sysinfo program 🙂

[rensoup]

On 3/7/2023 at 8:16 AM, foft said:

They are purely 'fixed' dma slots at the moment, which is complicated by antic requesting the dma and gtia reading the bus at the same time! So 5 slots: 4 pms, 4 missiles. The width could definitely have been increased with minimal cost, add 5 more dma slots and then an extra register per PM in GTIA. There could also have trivially been the option to use the extra byte for 4 bit colours instead of wider. Oh and of course could also just clock them slower, so 1x,2x,4x,8x,16x width... (which is what I think you meant re-reading this...)

Yeah I just meant larger scale values, possibly together with 8 players instead of 4 players + 4 missiles. Basically just extend the 4 missiles to regular players (taking 4 dma cycles instead of 1), even with the same color registers... those features might have been a game changer!  The PMs could even have been used in a similar fashion as the Snes' windowing layer... Such a disappointment