32 Bit Processor for the 8-Bit Product Line!

[+Guitarman]

FYI....

 

If you have been following the Atari Flashback forum under "Dedicated Systems" here at AtariAge, The Flashback 3 is/was to have been a system based around the 5200/8Bit systems. According to Curt Vendel, who is/was developing the Flashback systems, it would have been compatable with the 8Bit line with added mods. Here are the specs he listed for the FB3:

 

800 computer in a 5200 case

function keys/buttons along under the silver strip for pause, select, keypad, etc...

FB2 joystick usage

Front SD card slot acting as D1:

edge connector inside on board to solder an 800 cart connector to for legacy cartridge usage.

Built in SIO2PC connection port for transferring to/from console

footprint for SIO connector to be added

footprint for ps/2 keyboard connector

footprint for vga out

Composite out

 

Games included would've come on an SDcard

 

 

That was what was being shot for, much of the VHDL work on several of the chips went through first pass work and I have in fact tapped a few people from the community to help on the completion of the chipset and need to send out appropriate chip schem's on the 800 for some additional work to be done.

 

Considering the format of the Flashback2 being a 2600 on a chip, it would probably be reasonable to say that the FB3 will/would have used a 6502 on a chip. You might want to get a hold of Curt because if Atari decides not to move forward with the FB3, there may be a community effort to get it built anyway.

 

Food for thought.

 

 

I, myself, would love to see a NEW Atari 8bit, just for something new to hack at!! There is a genuine love for these systems from many people and a new system would be the next logical step in continuing its legacy, if only appealing to us Atari freaks!!!

Edited April 27, 2006 by Guitarman

[PacMan]

Also, why isn't a 14MHz 65816 sufficient for upgrading an 8-bit? Who's going to want to write anything substantial for a 32-bit 800? And personally, I enjoy the obsolescence of the Atari.

 

True, if I want to work with something "hotter" than the Atari's I play with my GP2X. But this is probably because I'm more into software than hardware. However for mr Coffee Unix (I wonder if he has a Porsche 928 ) with a hardware background I can see that what he is discussing would pose a challenge. I will follow any progress mr Coffee makes with great interest and offer my input if I can.

 

/P

[ZylonBane]

Best-case scenario is that he builds a really cool Atari variant with no software to take advantage of it.

 

At least RAM expansions and peripheral interfaces have some relevance to legacy software. Stuff like this... does not.

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[Rybags]

Xena.

 

Get a busty chick wearing a leather bra to promote it.

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[Rybags]

Why would you want to do that?

 

I know that it would fail... 2 simultaneous accesses on the address bus would invalidate the address.

 

2 simultaneous writes on the data bus would likely result in the data being ANDed or ORed together (I've read something about it elsewhere, maybe for the C-64?)

 

A more feasible method would be to have a chip which was fed the master clock signal and distributed it to both CPUs, and asserted a DMA pulse on alternating clock cycles for each CPU (as well as passing ANTICs DMA pulses).

 

But, the result would be a dual CPU system with the same net speed as one machine - although some benefits arise like multithreading, plus being able to devote one processor to service interrupts. Downfalls include the fact that the 2 6502s would share the same stack, plus all the normal MP restrictions apply.

 

The 6502 lacks 3 main things which are needed for an MP system to function:

- external signalling input for communication between CPUs

- an indivisible instruction which can test and set a flag (for resource locking)

- virtual storage, or at least a means to share and fence memory between processors

 

The easiest setup with a faster processor may well be to have it accessing extended RAM only (think 1 meg SIMM upgrade) - and allowing the normal 6502 to access that memory as per the normal PORTB switching methods.

Edited April 29, 2006 by Rybags

[PacMan]

Can you do a feasibility study on shared RAM environments before we get the ball rolling here? What we need are two open identical 8-bits (good project for two 400s, stock). We need to sync the clocks, and run a ribbon cable from the empty ram on one to the ram on the other one without blowing it up.

 

As for software, as Zylonbane had mentioned, can we get an assembly program to add two numbers and place them in a memory location from both sides (from each computer). Obviously, each computer will write asynchronously, & to a different memory location. If we can then read that sum from both sides, we will have a primitive shared memory, which we can further exploit by creating dynamically modifiable protected areas in expanded ram space later.

 

The killer app for the day will be to store an array structure as a vector from both sides. If this works, a synchronization subroutine can be added that will automate the process of filling ram locations, and performing calculations and bitwise manipulations alternating back & forth between the machines. Whoever does it first will probably be the first person to perform a type of vector processing on a multiprocessor Atari 8-Bit...

UNIXcoffee928

 

What you're looking for to get this working is a Multi Port RAM. These come in dual port configurations which would work nicely in this situation. Follow this link for more information. This would effectively open up a common RAM area between the two (or more) processors. Other solutions to multiprocessor problems is to have dual port FIFO's to exchange data. These are more suited for message based communication though. You could for instance create a support FPGA running a 6502 CPU on say 50 MHz connected with a FIFO to the main Atari system. This solution could even be included in a cartridge.

 

/P

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[Bryan]

I totally agree, that's why I said the model should be asynchronous, (not simultaneous) -first manually entered alternately from the first machine, then manually entered from the next machine.

 

I think the word you want is interleaved or multiplexed. Asynchronous means "without a clock."

 

-Bry

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[PacMan]

I guess I'm just thick here. Could you wip together a simple block diagram on what you are after. Connecting two 400's with one memory bank just doesn't seem doable to me.

 

/P

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[DamageX]

heh, I think you should know that the actress pictured in my avatar is not me, and I'm not a she...

 

Now then, switching on a couple of 400s and hoping the CPU clocks are synchronized is not going to work, no matter how lucky you are. You need to halt one CPU while the other has the bus as Rybags described or you need faster memory which can be accessed by each CPU in an alternating sequence.

 

If you want to gain performance by having multiple CPUs you need to have a separate independent memory bus for each one, or at least a cache.

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[mos6507]

For ages? I can see that first rumours appeared on the net just 9 months ago.

 

It is true that there were some rumours about a vaporware WDC CPU trurly for ages, and there are even manuals available on the net (which seem fake), but this is the legendary 65C832 and not the 65T32. That last is at least mentioned on the WDC pages, and it wasn't last time I checked...

 

Terbium discussions go back at least two years.

 

http://tinyurl.com/jthoh

[PacMan]

- The ribbon leads are going directly to the conductors on the RAM module, and not traversing the bus on the machine with the RAM, so as a result, the connection would not be effecting any memory management, because it is just a straight electrical connection. I mean this is all just a hypothesis, but really, until someone does the test, can we be 100% sure that this method will not work?

 

Yes, we can be 100% sure that this will not work. Even if you get the clocks 100% synchronized (Which you never ever will) you will have bus conflicts. These conflicts will affect the operation of both machines. You need to separate the busses completely. I don't see the point of trying this out. Instead, slap a FIFO on the personality module so that the processors can talk together. Then again I don't see the point in doing that either. Skip the initial steps and work on a draft on what you are aiming at and let us have a look at that. That should give us something to really discuss.

 

LS244 & LS258 are only address decoders, am I correct?

 

The 244 is a buffer and the 258's are muxes.

 

/P

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[danwinslow]

nm

Edited April 30, 2006 by danwinslow

[drac030]

Terbium discussions go back at least two years.

 

This I wouldn't call "ages" either, but surely you're right that it is a bit earlier than I thought. I am pretty sure though that there was no information about 65T32 on the WDC page two years ago (or even a year ago - but about this I am not so sure).

[NovaXpress]

How about building a Beowulf Cluster of these? That would be teh r0x0r!

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928

[UNIXcoffee928]

Due to lack of interest this post has been removed.

Edited May 4, 2006 by UNIXcoffee928