TIA Memory Map beyond 0x2C

[jbanes]

Hello! A quick question if I may. Does anyone know if the TIA memory map between 0x2D and 0x3F does anything? I've been looking at some old documents that suggest the 0x2D might be a soft reset of some sort, and that 0x30 - 0x3F contains memory pointers. Does anyone know if this area was mapped, and/or if the map is reliable across systems?

 

Thanks!

[supercat]

Hello! A quick question if I may. Does anyone know if the TIA memory map between 0x2D and 0x3F does anything? I've been looking at some old documents that suggest the 0x2D might be a soft reset of some sort, and that 0x30 - 0x3F contains memory pointers. Does anyone know if this area was mapped, and/or if the map is reliable across systems?

 

The TIA will respond to all addresses of the form xxx0.xx0x.xxxx.xxxx (i.e. all addresses where A9 and A12 are both zero). When writing, the bottom six address bits are decoded (so all addresses of the form xxx0.xx0x.xxnn.nnnn will be treated the same as 0000.0000.00nn.nnnn). When reading, the bottom four address bits are decided (so all addresses of the form xxx0.xx0x.xxxx.nnnn will be treated the same as 0000.0000.0000.nnnn).

 

Only the top two data bits have any read circuitry associated with them. Therefore, when performing any TIA read, the bottom six bits are generally undefined. On most machines, they will match whatever was last on the data bus, so "LDA $1F" would usually load $1F while "LDA $240F" would load $24 (since the MSB of the address is read after the LSB).

 

Note that while the Atari's on-board hardware may make any distinction among all the different mirrors of TIA and RIOT addresses, some game carts do. The 4A50 cart, for example, has many hotspots in the range $6400-$6FFF and I'm working on an EEPROM-equipped cart that will also have many hotspots in that range.

[jbanes]

Thanks for your help Supercat! Unfortunately, I think I may have been unclear in my question. What I'm wondering is if anyone has written documentation (aka "a mapping") of what the addresses above 0x2C are used for? Or at least explored what these addresses do, if anything?

 

The reason why I ask, is that I am trying to decode a document that suggests that it may be possible to use the 0x2D "soft reset" (if such a thing exists) to force the TIA into plotting the player graphics multiple times. I do know of the TIA Hardware Notes document that suggests that it is possible to "trick" the TIA into resetting in the middle of a triple count blit of a player sprite (since a RESPx only resets the TIA to a "start" state once per scanline), but this reset could potentially be far more powerful.

 

It may just be a wild goose chase, but I'm trying to look into all avenues in order to decode the meaning behind this document. So far, it hasn't made much specific sense to anyone who's looked at it. Thanks for your help!

[Tom]

The reason why I ask, is that I am trying to decode a document...

 

...but I'm trying to look into all avenues in order to decode the meaning behind this document

 

What document ?

[+batari]

Thanks for your help Supercat! Unfortunately, I think I may have been unclear in my question. What I'm wondering is if anyone has written documentation (aka "a mapping") of what the addresses above 0x2C are used for? Or at least explored what these addresses do, if anything?

According to the TIA schematics, addresses 0x2D to 0x3F are not decoded. At best, their behavior is undefined, but most likely stores there will simply do nothing. I'll check again in a minute here though.

Edited June 15, 2006 by batari

[Kroko]

Maybe this is what you need ?

tia_map.txt

[jbanes]

Maybe this is what you need ?

 

Dude, you rock! Between your document and Batari's explanation, that's more or less the information I was looking for. Basically, we can safely say that the 0x2D address is not known to do anything when written/strobed. If it actually does what the notes I'm looking at suggest, it's most likely unexpected behavior that may or may not be reliable. Just as likely, those notes are just brainstorming that never panned out.

 

Tom, the document is an engineering log from Curt's museum, but I don't really want to get into the details right now. Let me keep plugging at this problem a bit, and I'll happily post my crazy theories when I'm certain of a bit more.

[supercat]

Dude, you rock! Between your document and Batari's explanation, that's more or less the information I was looking for. Basically, we can safely say that the 0x2D address is not known to do anything when written/strobed. If it actually does what the notes I'm looking at suggest, it's most likely unexpected behavior that may or may not be reliable. Just as likely, those notes are just brainstorming that never panned out.

 

If the schematics on this site are accurate, "undefined" TIA write addresses will never do anything, and undefined TIA read addresses will always read zero (at least on the top two bits).

[jbanes]

If the schematics on this site are accurate, "undefined" TIA write addresses will never do anything, and undefined TIA read addresses will always read zero (at least on the top two bits).

That's pretty much what I understood from what you guys were saying. Which is why I said if it works at all, it may be unreliable. i.e. There may be unexpected circuitry triggered by the call. Or it may be that the original engineers had a bad floppy. Or it may be that they're in a completely different address space and it doesn't mean what it appears to mean.

 

For now, I'm just filing those particular notes to the side of my head as "suspect."

 

Thanks for your help!

[Zach]

When writing, the bottom six address bits are decoded (so all addresses of the form xxx0.xx0x.xxnn.nnnn will be treated the same as 0000.0000.00nn.nnnn).

I must be misunderstanding this. This statement seems to imply that STA $0080 is equivalent to STA $0000. I've done enough programming to know that one is RAM and one is VSYNC.

[+batari]

When writing, the bottom six address bits are decoded (so all addresses of the form xxx0.xx0x.xxnn.nnnn will be treated the same as 0000.0000.00nn.nnnn).

I must be misunderstanding this. This statement seems to imply that STA $0080 is equivalent to STA $0000. I've done enough programming to know that one is RAM and one is VSYNC.

I think Supercat left off a zero. On first glance, maybe that should be xxx0.xx0x.0xnn.nnnn.

[Zach]

BTW, the advanced programming guide from qotile.net lists "DEC $2D" as the most concise way to "waste" 5 cycles. It seems likely that if writing to $2D had an effect, it would have been discovered by the time that guide was written.

 

EDIT: Indeed Marble Jumper writes to $2D in this way, without any observed side-effects.

Edited June 21, 2006 by Zach

[Zach]

I think Supercat left off a zero. On first glance, maybe that should be xxx0.xx0x.0xnn.nnnn.

No prob. I make typos all the time.

[cwilkson]

Actually, that's _my_ document.

 

Feel free to point directly to the original copies. You'll find complete 2600 memory maps

there in 2 formats, along with RIOT and TIA maps.

 

http://web.mit.edu/ecwilkso/www/VCS_hardware/

 

Enjoy!

 

-Chris

[supercat]

I think Supercat left off a zero. On first glance, maybe that should be xxx0.xx0x.0xnn.nnnn.

 

Actually, there should be two zeroes, but I had one in the wrong place. It should be xxx0.xxxx.0xnn.nnnn (note that bit 9 selects between the RIOT RAM and the RIOT I/O, but the TIA doesn't care).

[Cybergoth]

On most machines, they will match whatever was last on the data bus, so "LDA $1F" would usually load $1F while "LDA $240F" would load $24 (since the MSB of the address is read after the LSB).

 

Hey, so that explains why some code that forgets the "#" for constants often miraculously still works as intended?