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Atari 2600 "DOS"

mos6507

Entry posted by mos6507

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Another thing Delicon and I were discussing was how to handle the native Chimera file format. We decided that the best approach is for a Chimera game to load in a 4K "loader" which in turn instructs the ARM where to get the rest of the data and where to put it. While this adds some extra overhead to the game, it is the most flexible approach, and closer to how a modular program for an 8-bit home computer would work. Since the ARM would have the ability to use the FAT filesystem on the flash, then the VCS simply sends a short command to the ARM requesting that a file be opened, and to seek to a position in the file, and to read out a chunk and put it anywhere in the 128K SRAM space. The ARM does all the hard work. We should be able to carry this through the wire via serial also, using the control program on the PC. Right now we're thinking the control software will probably be a java application. The upside of all this is that we abandon the notion of supercharger packets and loads and just leave it to the VCS to do general IO routines. This didn't make sense before we implemented the filesystem, but now we can do it. So the programmer can modularize his game any way he chooses. You aren't limited to 256 byte segments. Load IDs no longer mean anything. It also means that a game doesn't have to jump out into the loader ROM to fetch more data. It may still have to pause, but it could keep the kernel going and display some kind of loading indicator. So IO will be more like having a hard drive or a CD-ROM for the VCS.

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mos6507

You never really know what this is going to do until you start playing with it. It's going to be like a brand new platform. The DPC is mostly a read-only device, a database of graphics that gets spooled out in various ways. The RAM-based queues are much more flexible.

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supercat
Namely, if the 6507 is driving the bus to $FF during a TIA write, is it possible to change this value on the fly without damage so a different value gets written to the TIA?

 

The 6507's outputs are not open-collector, but the pull-up transistors are weaker than the pulldowns. One could "probably" force zeroes onto the data bus when the 6507 was trying to output ones without glitching things, but I wouldn't count on it. Driving a "1" when the 6507 is trying to output a zero can cause damage (anyone want a fried 6507? I have one ;))

 

Still, there are a number of addresses where a 5-cycle read/modify/write instruction could be very handy. These would include NUSIZx, AUDVx, CTRLPF, AUDxx, ENAxx, and maybe HMxx (if the MSBs of the collision latch results were predictable). Outputting stuff on the lower portion of the data bus shouldn't be a problem provided one ensures that, if using a 7800, one is in 2600 mode first (during a 7800's startup process, addresses will appear that look like zero-page but aren't).

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