more Disk ][ musings
As I mentioned in my previous entry, I've been taking a deep look at the Apple ][ Disk ][ controller. IMHO it's an elegant blend of hardware, software & firmware.
The crux of the controller is the P6 (8bitx8bit) PROM which describes the state machine along with an 8 bit shift register and a 4 bit state register.
The CPU selects one of four modes via two PROM address bits (called Q7 Q6):
00 read a byte
01 sense write protect
10 write byte
11 load byte for write
The other 2 address bits come from the high bit of the shift register and a read pulse (indicating a change in magnetic field). The four output bits select the shift register function (NOP, LD, CLR, SR, SL1, SL0). The high bit of the state register is also connected to the write head.
Mode 01 is very simple. It shifts the write protect state into the high bit of the shift register (SR) and goes to state zero. This is also used to initialize the state machine to a known state.
Modes 10 & 11 work together in a tight 8 cycle (4 CPU cycle) loop. The CPU loads the byte to be written then does a
cycle 0/32/64 STA $C08D,X // load shift register
cycle 4/36/68 CMP $C08C,X // start shifting out bits
The state numbers do an interesting back & forth to encode '1' bits as a change in magnetic field. As I noted previously, the controller does not limit the bit encoding used. It does, however, restrict the timing. So any copy protection designed to confuse the read mode state machine, e.g. by changing the magnetic field very quickly, would have to be written using something other than a standard Apple ][ Disk ][ controller.
I'll discuss Mode 00 in my next entry, 'cause it isn't simple.
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