Overview
About This Club
About the "Community-Built Unnamed 1970's Video Game Console-Compatible System (WIP)"
BTW: Is is a good idea to FOLLOW the club to stay informed.
- What's new in this club
-
- 818 replies
-
- 11
-
Yes the board. StellaRT is the emulator, but basically the board/hardware can be used with any emulator that has a cartridge port driver. That's why I'm not in favor of using terms like Stella or Pi when naming the device, because on the Pi side of things there might also be "alternatives".
-
Sounds the best to me. I figured out a lot about the project just from that name.
-
No love for StellaRT? Or is that name meant only for the board?
-
and forgo CBU1970sVGC-CS-WIP as a name? It practically rolls of the tongue!
-
I have now decided to at least give the prototype board an abbreviated working name "aRTa26" (an abbreviation for "A RealTime Atari 2600"). "Community-Built Unnamed 1970's Video Game Console-Compatible System (WIP)" was too long for the silkscreen.
-
I was recently thinking about what if instead of a standard 5V supply with 10% tolerance (max 5.5V) we had a 4.5V supply with a much lower tolerance (2%)? The Max-II I/Os are 4.6V tolerant and most cartridges should work with 4.5 volts too. Maybe we could get rid of the 74LVC245 with this trick too. 🤷♂️ We only would need a voltage regulator circuit to get the Pi's 5V supply to 4.5V on our board.
-
I was aware that you wanted the protection of the CPLD only for faulty cartridges. But I am honestly more concerned about the 5V on the joystick ports. Switching to 3.3V there shouldn't effect the functionality of the joysticks and maybe even the paddles, but some devices (e.g. AtariVox, Quadtari, CompuMate) might need the 5V
-
So the cartridge supply voltage is 5V and if the cartridge works fine, then we never see 5V at the address lines (obviously because these are all inputs). But what if someone plugs in a faulty cartridge ? We might see 5V on the address lines in that case, dependent on what kind of issue the cartridge has, right ? Do we care that this might destroy our CPLD ? Maybe another driver for the address lines is too much effort, but something to think about ...
-
I was uncertain if the CPLD might want to influence the exact timing of that signal and thought it might be handy to give the CPLD full control over the cartridge pins and not share it between CPLD and Pi. But maybe its also fine without it. If it is always connected to ground it will always drive its outputs on one end (dependent on DIR which is only stable after Pi has powered up). Either it drives data lines on the cartridge side (which is fine as long as you can guarantee that we can never see an address on the cartridge bus that makes the cart output its data as well) or it drives the lines on the CPLD side, which is also fine as long as we can make sure that the CPLD is not driving these lines at the same time. (And we don't know exactly what DIR looks like since its coming from Pi). We might be fine without it, but having the NOE connected to a GPIO probably with a pullup would probably be a safe way to make sure the datalines are not driven if we don't want that.
-
I thought of this too, but the emulator on the Pi is the only one that can decide if it is a read from the cartridge or if it is data for the cartridge to read/peek. This is clear (for the Pi/emulator) at the beginning of a "cycle", so there is no need to control the DIR on the 74LVC245 with the MAX-II 👍 this could be handy for "switching off" the cartridge. I want to make some changes this weekend. But even then it will be in an early WIP test-board state most likely not working.
-
I remember I actually had trouble with missing decoupling capacitors with the XC95108 and only got it 100% stable after adding them and even setting the "slew" attribute of the pins to "SLOW". So if you still have the possibility to add them I would do it. Edit: Any chance you could share your KiCad files here ?
-
I am missing decoupling capacitors in your design. Did you forget them, or was this a decision you made ? Its pretty standard to have at least a few decoupling capacitors close to the CPLD ... From datasheet: "As the number of I/O pins and the capacitive load on the pins increase, more decoupling capacitance is required. As many as possible 0.1- mF power-supply decoupling capacitors should be connected to the VCC and GND pins or the VCC and GND planes. These capacitors should be located as close as possible to the MAX II device. Each VCCINT/GNDINT and VCCIO/GNDIO pair should be decoupled with a 0.1-mF capacitor."
-
Recently Browsing 0 members
- No registered users viewing this page.