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CMP rips ET bruttally in 2600 teardown


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This video teardown is just too funny --- this guy seriously HATES ET....

He made at least one error when discussing the 2600-- he said it was able to address "only 8K of RAM" directly. Wow, it would be awesome if the 2600 could actually do that! :lust: I think he meant to say "4K of ROM," but he was too busy hating E.T. to get his facts straight. :lol:

 

Michael

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This video teardown is just too funny --- this guy seriously HATES ET....

He made at least one error when discussing the 2600-- he said it was able to address "only 8K of RAM" directly. Wow, it would be awesome if the 2600 could actually do that! :lust: I think he meant to say "4K of ROM," but he was too busy hating E.T. to get his facts straight. :lol:

 

Michael

Actually, the inclusion of "ram" was the error. The 2600's 13-bit address line makes it possible to address 8k of memory - $0000 to $0FFF for ram (potentially 4k), and $1000 to $1FFF (potentially 4k) for rom. Because 4k of ram is not actually present, much of the lower half of address space consists of "shadows" (copies) of the ram that is.

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He made at least one error when discussing the 2600-- he said it was able to address "only 8K of RAM" directly. Wow, it would be awesome if the 2600 could actually do that! :lust: I think he meant to say "4K of ROM," but he was too busy hating E.T. to get his facts straight. :lol:

 

He also called the RIOT a PIA.

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The 2600's 13-bit address line makes it possible to address 8k of memory - $0000 to $0FFF for ram (potentially 4k), and $1000 to $1FFF (potentially 4k) for rom. Because 4k of ram is not actually present, much of the lower half of address space consists of "shadows" (copies) of the ram that is.

Yes, the *potential* address space is 8K-- but as I understand it, it isn't just a question of whether 4K of memory (be it RAM or ROM) is present in the lower 4K area; it's really a question of how the things that *are* there-- namely, the TIA and RIOT chips-- are connected to the 6507's address lines. Or I guess it's more accurate to say that the way the TIA and RIOT chips are connected to the 6507's address lines determines where they're "seen" in memory, including the way they're *mirrored* (not shadowed?) in memory. (The way I understand the use of the terms "shadow" and "mirror" is that a "shadow" location is a copy of another location, but the two locations are distinct from each other-- such as on the Atari 800 where you can write to a color register and read the value back again, but the operating system actually uses other memory locations for the colors, and copies the values into them, but you can't read them back from those other locations, just as you can't read the player0 color back from the TIA after you write to that register. On the other hand, a "mirror" is where two addresses are actually pointing to the same location, such that when you use either address, you're accessing the exact same location.)

 

Michael

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