The Ultimate Commodore 64 Talk: Video Recording from 25C3

[cas]

Hi,

 

Michael Steil of "pagetable.com" does a very entertaining and informative talk at the Chaos Communication Congress 25C3 in Berlin, talking about everything C64 in 64 minutes on 256 slides. A must see for all 6502/Retro fans. I learned a lot about how the C64 works in comparison to the A8. The video-recording is available on Michaels Webpage -> http://pagetable.com

 

Please no Commodore flamewars, enjoy a very good piece of retro computing show, or kepp sileence!

 

Carsten

[Heaven/TQA]

which of the chip bugs are in our 6502?

 

esp. the Ghost byte one...#

Edited January 5, 2009 by Heaven/TQA

[ijor]

which of the chip bugs are in hour 6502?

 

All of them.

 

But they aren't strictly bugs. Except one, they are really all features or quirks if you want, fully documented since day one.

[Heaven/TQA]

sure?

 

I thought that the Atari version does have less bugs.

[Rybags]

Pretty sure the Atari 6502 is functionally identical from the programming POV (aside from lack of I/O ports and it's requested ability to decouple from the bus during Halt)

 

What's this "Ghost byte" thing? I didn't watch the video, only had a look at the text.

Edited January 5, 2009 by Rybags

[cas]

Pretty sure the Atari 6502 is functionally identical from the programming POV (aside from lack of I/O ports and it's requested ability to decouple from the bus during Halt)

 

What's this "Ghost byte" thing? I didn't watch the video, only had a look at the text.

 

 

From the "pagetable.com" webpage:

 

STA with the absolute-indexed addressing mode takes first reads from the absolute address without the index register added, and then reads again from the correct address. LDX #$07 STA $D019,X will first read from $D019, discard the result, and then write to $D020. On the C64, this read form $D019 would ACK all pending VIC interrupts, while it is only supposed to write to the border color ($D020).

[Fröhn]

which of the chip bugs are in hour 6502?

 

All of them.

 

But they aren't strictly bugs. Except one, they are really all features or quirks if you want, fully documented since day one.

There are a few real bugs, for example:

 

JMP ($10FF) should read the address from $10FF and $1100, but it actually reads the address from $10FF and $1000.

 

From the "pagetable.com" webpage:

 

STA with the absolute-indexed addressing mode takes first reads from the absolute address without the index register added, and then reads again from the correct address. LDX #$07 STA $D019,X will first read from $D019, discard the result, and then write to $D020. On the C64, this read form $D019 would ACK all pending VIC interrupts, while it is only supposed to write to the border color ($D020).

That doesn't work. To ACK the VIC2 IRQs you have to set the IRQ bits like this: LDA $D019 STA $D019. Reading alone only works for CIA IRQ flags.

[ijor]

sure?

I thought that the Atari version does have less bugs.

 

Yes, I'm sure.

 

It is not "our" 6502, "our" Sally, or "their" 6510. In all cases, the core is the same, it is the original MOS 6502 core. The difference is some additional extra gates outside the core, and bonding (pinout). In this regard, it is similar as comparing the 6502 with the 6507 (present in the 2600, 810, 1050, etc), the core is identical. Whatever bugs, features or quirks present in the original core, would be present in the derived part as well.

 

A software analogy would be an original library or object code. You can have multiple different programs or executables using the same object code or library. As long as the original library is not modified, then bugs (in the library) are not fixed.

Edited January 5, 2009 by ijor

[ijor]

There are a few real bugs, for example:

JMP ($10FF) should read the address from $10FF and $1100, but it actually reads the address from $10FF and $1000.

 

It is surely not a bug. It is documented behavior, and it is an obvious consequence of using the same logic as in the zero page indirect mode.

 

You might argue that you would still consider it a bug. Might be, bug or feature is sometimes a matter of personal opinion. The important difference here is that it's not something that they realized later, and said "oops". Peddle was aware about the behavior all the time, he just decided (right or wrong) that it doesn't matter, ot that at least it wasn't worth the extra logic (and cost) required to "fix" this.

 

Of course, a programmer doesn't care too much if a "strange" behavior is by design or because of a typo. He probably cares much more about being documented or not.

Edited January 5, 2009 by ijor

[Fröhn]

There are a few real bugs, for example:

JMP ($10FF) should read the address from $10FF and $1100, but it actually reads the address from $10FF and $1000.

 

It is surely not a bug. It is documented behavior, and it is an obvious consequence of using the same logic as in the zero page indirect mode.

While I'm ok that "8 bit wraparound" is somewhat "ok" behavior for zeropage addressing, at this 16 bit example it's definitely out of place. And are you sure that that bug was known from the beginning? I wouldn't think so.

 

And there was another bug which is a bit more obscure: If IRQ and NMI happen at the same cycle, the NMI will never happen. Now if that ain't a bug, I don't know what is

[Bryan]

There are a few real bugs, for example:

JMP ($10FF) should read the address from $10FF and $1100, but it actually reads the address from $10FF and $1000.

 

It is surely not a bug. It is documented behavior, and it is an obvious consequence of using the same logic as in the zero page indirect mode.

I don't believe this is a bug either, but rather an inconvenient design limitation. It would be a bug if the carry logic required to cross a page boundary was there but didn't work right. In this case I think it was just a side-effect of re-using logic to create a special case instruction.

[ijor]

While I'm ok that "8 bit wraparound" is somewhat "ok" behavior for zeropage addressing, at this 16 bit example it's definitely out of place. And are you sure that that bug was known from the beginning? I wouldn't think so.

 

"out of place" doesn't have a very strict sense and might be a matter of POV. There are a lot of hardware examples where an address has to be aligned at some boundary, or that it can't cross a certain boundary.

 

And yes, it was documented since day one. If you don't think so, then please check the original documentation.

 

And there was another bug which is a bit more obscure: If IRQ and NMI happen at the same cycle, the NMI will never happen. Now if that ain't a bug, I don't know what is

 

I didn't say none of them is a bug, or that the 6502 was 100% bug-free, did I? Check my first post in this thread. I said that all the bugs (mentioned in that article), except one, are actually documented features, and not bugs in the strict sense. Now, which one of them do you think was the exception I was talking about?

 

The bug you are mentioning is not exactly the same one mentioned in the article, but it is just a variant. This is, of course, a real bug. Undocumented, and likely missed by Peddle.