Walking through bank switching

[+acadiel]

I'm working to write a description of how the bank switching scheme works in the 512K cart. I wanted to run this by everyone to make sure I'm understanding it correctly so that there are no mistakes...

 

(I've attached a 74LS379 block diagram for reference, so we'll use it. I'll add the extra D4 and D5 lines to my final description for the 512K bank switch cart when I'm done.)

 

1) When we set up TI A0-A15 (the address lines) to read/write to the cartridge address space (>6000->7FFF), cartridge board pin #34 (ROMG*) is made LOW). If we are not read/writing from that space, it is HIGH by default. This is connected to E* (pin #1) on the 74LS379.

2) E* (pin #1) on the 74LS379 is enabled by bringing it LOW. Since ROMG* is connected to E*, when ROMG* is made LOW (i.e. cartridge ROM space is being accessed), this enables the 74LS379.

3) When enabled, the 74LS379 is now outputting data on it's *Q0 - *Q3 outputs (pins #3, #6, #11, and #14). By default (this behavior is not defined and there is no standard here), we get 1111 on those inverse outputs. (These are hooked up to A14, A13, A12, and A11 on the TI. A15 is not used because ??)

 

74LS379 (Active, Enabled, Power-up [Typical)]

Any write from 0110 0000 0000 0000 (>6000) to 0111 1111 1111 1111 is valid to bring *E low.

 *ROMG A11  A12  A13  A14  A15 (TI PINS)
 ||   ||   ||   ||   ||   ||
 L    0    0    0    0    0    (TI PIN VALUES)
 ||   ||   ||   ||   ||   ||
|==============================|
| /\   /\   /\   /\   /\   /\  |
|*E    D3   D2   D1   D0   n/a |(74LS379 PIN INPUTS)
| ||   ||   ||   ||   ||   ||  |
|n/a  *Q3  *Q2  *Q1  *Q0   LSB |(74LS379 PIN OUTPUTS)
| \/   \/   \/   \/   \/   \/  |
|==============================|
 ||   ||   ||   ||   ||   ||
n/a   1    1    1    1    n/a (74LS379 OUTPUT VALUES)
 ||   ||   ||   ||   ||   ||
n/a   A16  A15  A14  A13  n/a  (EPROM address lines)

 

4) When we *write* to the cartridge ROM address space, cartridge board pin #32 (WE*) is made LOW (It's normally active high). This is hooked up to the CP pin (#9) on the 74LS379. (Can someone explain how this whole CP thing works?)

5) When CP is LOW, this "clocks" the 74LS379. Whatever the 74LS379 is seeing on its D0-D3 (pins #4, #5, #12, #13) inputs (which is't getting from TI A11-A15), out puts the inverse output on EPROM A13-A16.

 

So, on a 128K EPROM, writing to the following addresses will do the following:

Address TI A11-A14   379 output, EPROM A13-A16
>6000   0000             1111
>6002   0001             1110
>6004   0010             1101
>6006   0011             1100
>6008   0100             1011
>600A   0101             1010
>600C   0110             1001
>600E   0111             1000
>6010   1000             0111
>6012   1001             0110
>6014   1010             0101
>6016   1011             0100
>6018   1100             0011
>601A   1101             0010
>601C   1110             0001
>601E   1111             0000

 

6) Let's look at this from an EPROM point of view with the above outputs from step #5:

128K EPROM has address space >0000->1FFFF
      A16 A15 A14 A13 A12-A0
8K #1   1   1   1   1   1111111111111-0000000000000 (>1E000->1FFFF)
8K #2   1   1   1   0   1111111111111-0000000000000 (>1C000->1DFFF)
8K #3   1   1   0   1   1111111111111-0000000000000 (>1A000->1BFFF)
8K #4   1   1   0   0   1111111111111-0000000000000 (>18000->19FFF)
8K #5   1   0   1   1   1111111111111-0000000000000 (>16000->17FFF)
8K #6   1   0   1   0   1111111111111-0000000000000 (>14000->15FFF)
8K #7   1   0   0   1   1111111111111-0000000000000 (>12000->13FFF)
8K #8   1   0   0   0   1111111111111-0000000000000 (>10000->11FFF)
8K #9   0   1   1   1   1111111111111-0000000000000 (>0E000->0FFFF)
8K #10  0   1   1   0   1111111111111-0000000000000 (>0C000->0DFFF)
8K #11  0   1   0   1   1111111111111-0000000000000 (>0A000->0BFFF)
8K #12  0   1   0   0   1111111111111-0000000000000 (>08000->09FFF)
8K #13  0   0   1   1   1111111111111-0000000000000 (>06000->07FFF)
8K #14  0   0   1   0   1111111111111-0000000000000 (>04000->05FFF)
8K #15  0   0   0   1   1111111111111-0000000000000 (>02000->03FFF)
8K #16  0   0   0   0   1111111111111-0000000000000 (>00000->01FFF)

 

This means that the "low bank" (>6000) is actually your upper 8K. and the "high bank" (>601E) is at the very bottom of the EPROM address map.

 

7) (Not sure): When our read/write to the cartridge ROM address space is finished (i.e. the TI is talking to something else not in the cart space), E* (pin #1) on the 74LS379 is disabled by bringing it HIGH. Since ROMG* is connected to E*, when ROMG* is made HIGH (i.e. cartridge ROM space is not being accessed), this disables the 74LS379 from putting anything on its outputs to the EPROM address lines. (What exactly DOES happen, then, to those EPROM address lines?)

 

Hope this helps those who need help understanding bank switching, and hope that I can get some of the clarifications that I need in here (like how CP works, and my other questions I put in parenthesis).

 

Thanks, all!

[Willsy]

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

[+acadiel]

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

 

Legacy use. I found that most of the 16K ROM carts out there (i.e. DataBiotics) used it, so that's what I used.

[Willsy]

Can we have a jumper to change it? Pretty please? I mean, you're not using a real '379, right? The DIL ones are obsolete as far as I know. Presumably the '379 is emulated in the fpga?

 

Sorry if I've got this all arse about face... I'm ill in bed so I'm hogging the forum!

[+acadiel]

Can we have a jumper to change it? Pretty please? I mean, you're not using a real '379, right? The DIL ones are obsolete as far as I know. Presumably the '379 is emulated in the fpga?

 

Sorry if I've got this all arse about face... I'm ill in bed so I'm hogging the forum!

 

I think that Ksarul put an invert jumper in there for the new GAL, if I'm not mistaken, but he'll have to chime in.

[+retroclouds]

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

 

I unfortunately have to agree on that, as far as coding is concerned

[Tursi]

A15 is not used because ??

Because we can not control it. Every access to the cartridge port will trigger A15 as both a 0 and a 1 access (reading or writing the even and odd byte of a word). This is the nature of our 16-bit machine, A15 is not a real address line, it's just created to support the 8-bit bus.

 

Can someone explain how this whole CP thing works?

CP stands for Clock Pulse. When this line transitions from low to high, it triggers the circuitry inside the 379 to read the inputs, and latch the data for the outputs. On the TI, this happens right at the end of the memory cycle. (Note this explanation affects point 5 slightly).

 

this disables the 74LS379 from putting anything on its outputs to the EPROM address lines. (What exactly DOES happen, then, to those EPROM address lines?)

According to the datasheet I found, the 379 outputs are never floating - they always present the last data they were outputting. Are you sure they float in the datasheet you found?

 

Floating address lines could cause unpredictable behaviour from the EPROM, so I'd be surprised.

 

All the Enable line on the 379 does is tell it to listen to the CP.

 

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

I agree, personally. It means you have to code specifically for the EPROM size you are using. But, that's how XB worked, and everyone copied XB.

Edited August 2, 2011 by Tursi

[+Ksarul]

Yes, the new board can be set to use the outputs in non-inverted mode, if selected, thanks to Matthew. Note also that he coded the GAL for a known start state so that it would always come up as expected on startup.

[Willsy]

That's great news. This really is going to be a great board! I already have plans for a major project with it... Sigh...!

 

Thanks to you all.

 

Mark

[marc.hull]

2) E* (pin #1) on the 74LS379 is enabled by bringing it LOW. Since ROMG* is connected to E*, when ROMG* is made LOW (i.e. cartridge ROM space is being accessed), this enables the 74LS379.

 

Yes but it is only half of the "enable procedure" in your circuit.

 

 

3) When enabled, the 74LS379 is now outputting data on it's *Q0 - *Q3 outputs (pins #3, #6, #11, and #14). By default (this behavior is not defined and there is no standard here), we get 1111 on those inverse outputs. (These are hooked up to A14, A13, A12, and A11 on the TI. A15 is not used because ??)

 

The 379 is always outputting data on it's Q0-Q3 lines. Enable is simply one part of a two part step which allows those outputs to be changed (in conjunction with the clock pin.)

 

4) When we *write* to the cartridge ROM address space, cartridge board pin #32 (WE*) is made LOW (It's normally active high). This is hooked up to the CP pin (#9) on the 74LS379. (Can someone explain how this whole CP thing works?)

5) When CP is LOW, this "clocks" the 74LS379. Whatever the 74LS379 is seeing on its D0-D3 (pins #4, #5, #12, #13) inputs (which is't getting from TI A11-A15), out puts the inverse output on EPROM A13-A16.

 

WE* by definition is active low. meaning that the computer is trying to write data. This is the second part of your latching mechanism. When both the Enable pin and clock pin are active (actually rising edge on the clock) then the 378 will accept the data on the address lines and output it's compliment on the Q lines thereby feeding page data to the EPROM. In effect the two conditions that must be met in order to change the page are...

 

WE* (the computer is trying to write data.)

AND...

ROMG* (the Target is the cart space.)

 

After this cycle is complete the 379 will continue to output data to the EPROM until another bank select cycle is performed. The chip has no provisions for a hi-z state as far as I can see.

 

 

So, on a 128K EPROM, writing to the following addresses will do the following:

Address TI A11-A14   379 output, EPROM A13-A16
>6000   0000             1111
>6002   0001             1110
>6004   0010             1101
>6006   0011             1100
>6008   0100             1011
>600A   0101             1010
>600C   0110             1001
>600E   0111             1000
>6010   1000             0111
>6012   1001             0110
>6014   1010             0101
>6016   1011             0100
>6018   1100             0011
>601A   1101             0010
>601C   1110             0001
>601E   1111             0000

 

I don't know if there is another chip available that outputs non complimentary data. If there is then it would be a simple matter of programming the banks in reverse order. Even older EPROMS that relied on the backwards paging could be made to work by switching the banks around when the EPROM is programmed. I wonder what drove the choice to use the 379..

At any rate it's a moot point now that you have programmable logic.

 

 

7) (Not sure): When our read/write to the cartridge ROM address space is finished (i.e. the TI is talking to something else not in the cart space), E* (pin #1) on the 74LS379 is disabled by bringing it HIGH. Since ROMG* is connected to E*, when ROMG* is made HIGH (i.e. cartridge ROM space is not being accessed), this disables the 74LS379 from putting anything on its outputs to the EPROM address lines. (What exactly DOES happen, then, to those EPROM address lines?)

 

A binary latch (your 379) is akin to a data buffer with the exception that the output is not lost when the cycle is finished. It's like a light switch (or rather 4 light switches.) When you turn it (them) on it(them) stays on until you turn it off. You can also look at like it is a 4 bit RAM chip. Once programmed it stays persistent until changed by your paging cycle.

 

Edited August 2, 2011 by marc.hull

[+acadiel]

Thanks, guys! I'll revise the documentation based upon your recommendations and send it over to Ksarul

 

I'll also add the part about the D4/D5 lines and another set of tables for the non inverted outputs.

Edited August 2, 2011 by acadiel

[marc.hull]

Thanks, guys! I'll revise the documentation based upon your recommendations and send it over to Ksarul

 

I'll also add the part about the D4/D5 lines and another set of tables for the non inverted outputs.

 

What's the part about the D4/D5 lines, did I miss something ????

[marc.hull]

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

 

Legacy use. I found that most of the 16K ROM carts out there (i.e. DataBiotics) used it, so that's what I used.

 

OK I'm puzzled... Why don't you understand how the circuits works ???

[+acadiel]

Thanks, guys! I'll revise the documentation based upon your recommendations and send it over to Ksarul

 

I'll also add the part about the D4/D5 lines and another set of tables for the non inverted outputs.

 

What's the part about the D4/D5 lines, did I miss something ????

 

Yep, Matthew's 74LS379 GAL replacement, besides having an invert jumper, can support not only D0-D3, but also a D4 and D5, allowing bank switching of the full 512K. I'll add that, but I was too lazy to put another 48 eight K banks in the address portion of this write-up at the time.

[+acadiel]

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

 

Legacy use. I found that most of the 16K ROM carts out there (i.e. DataBiotics) used it, so that's what I used.

 

OK I'm puzzled... Why don't you understand how the circuits works ???

 

I do understand how the circuit works (for the most part).

 

I was just following precedent when I designed the original 16K (and then 64K) board, Marc. I wanted my DataBiotics 16K EPROMs to be drop in replacements, and that involved me using the inverted Q0 output, because the power up bank of the DataBiotics carts was the upper bank (I think a copy of SuperStorm and RoboTron were the same way). By extension, I then made the 64K with an inverted Q1 and Q2 output not to break the 16K boards I had out there already. I never really designed a board that could use the inverted Q3 [128k] (except in prototype quantities either hacked 64K boards or a few that Ksarul helped with) because you have to jump from a 28 to a 32 pin IC, and the 27C1001 and such had enough differences with the 27128/256/512 that it would have been a pain to and had WAY too many jumpers! You should see the prototype 512K Multicart, which does use 128K x 4. It has like 10 jumpers on board.

 

So, I'm ultimately glad that Matthew answered the call and extended his GAL that he used on his own project to work with the full 512K. That means we can get rid of this legacy 74LS379 stuff, invert if needed (legacy purposes), or use straightforward addressing from >0 on the EEPROM.

 

I'm not an expert on digital electronics, nor do I want to come across like I know everything; I don't and typically learn as I go along, and make sure to ask plenty of questions. Thus, posting this write-up to get feedback about the way I currently understand things.

 

I did buy one of these to play with: Arduino UNO

It has some timing issues/shortcomings if I want to use it with the TI, but I'm having a blast learning digital theory on it.

Edited August 3, 2011 by acadiel

[marc.hull]

Why use the inverted outputs of the '379? Especially as there is programmable logic already on the chip. It makes coding a f**ing pain in the ass, quite frankly.

 

Legacy use. I found that most of the 16K ROM carts out there (i.e. DataBiotics) used it, so that's what I used.

 

OK I'm puzzled... Why don't you understand how the circuits works ???

 

I do understand how the circuit works (for the most part).

 

I was just following precedent when I designed the original 16K (and then 64K) board, Marc. I wanted my DataBiotics 16K EPROMs to be drop in replacements, and that involved me using the inverted Q0 output, because the power up bank of the DataBiotics carts was the upper bank (I think a copy of SuperStorm and RoboTron were the same way). By extension, I then made the 64K with an inverted Q1 and Q2 output not to break the 16K boards I had out there already. I never really designed a board that could use the inverted Q3 [128k] (except in prototype quantities either hacked 64K boards or a few that Ksarul helped with) because you have to jump from a 28 to a 32 pin IC, and the 27C1001 and such had enough differences with the 27128/256/512 that it would have been a pain to and had WAY too many jumpers! You should see the prototype 512K Multicart, which does use 128K x 4. It has like 10 jumpers on board.

 

So, I'm ultimately glad that Matthew answered the call and extended his GAL that he used on his own project to work with the full 512K. That means we can get rid of this legacy 74LS379 stuff, invert if needed (legacy purposes), or use straightforward addressing from >0 on the EEPROM.

 

I'm not an expert on digital electronics, nor do I want to come across like I know everything; I don't and typically learn as I go along, and make sure to ask plenty of questions. Thus, posting this write-up to get feedback about the way I currently understand things.

 

I did buy one of these to play with: Arduino UNO

It has some timing issues/shortcomings if I want to use it with the TI, but I'm having a blast learning digital theory on it.

 

 

Sorry, I didn't mean to offend. It just appeared that you didn't understand how the chip worked and since it is the only logic on the board I got a bit confused. Screw up with written words and interpretations I imagine .

 

If you really want to learn digital logic I would suggest buying a perf board, some LED's, diodes, DIP switches and logic chips. That uC ,although really neat, will insulate you from what you need to know (if you want to go down to the bones that is.) It will end up being more of a crutch than anything.

[+acadiel]

Hehe.. no biggie, Marc.

 

I actually have quite a collection of stuff component-wise (see pictures, below) and a nice area in the basement to play around with it. It's more of finding the time and asking the questions about things I'm not sure about. I may I have a degree in telecom, but the electronics courses were somewhat lacking (i.e. I never had a lab). So, it's asking questions, trial, and error to figure out how to describe what I'm trying to describe. You guys have all been absolutely great about answering questions throughout the years!

 

(Anyone want the IBM E-series AIX box?)