Can't find something

[Asmusr]

It works for me on my PAL console. In Classic99 it returns immediately.

 

       REF	VWTR
       DEF	START

VDPST  EQU	>8802
	   
START  LIMI 0
       LI  R1,>0170     VDP Reg 1, Enable IE bit.(mode bits may vary)
       BLWP @VWTR
       CLR  R12         9901 base cru
       SBO  2           vdp int via 9901, enable
       LI   R1,60*10    duration in 60th of a second slice
 
WAIT1  CLR R12
WAIT2  TB   2           vdp interrupt? (via 9901)
       JEQ  WAIT2       no, spin and wait
       SBO  2           enable 9901 int (tests show this may not be needed)
       MOVB @VDPST,R2   read status to clear 9918 VDP Interrupt
       DEC R1           counter expired?
       JNE   WAIT1      no, tick off another 60th of a second
       BLWP @0
       
       END	START

[Asmusr]

And it also works on my US console with the F18A.

 

Edit: ... and in MESS.

[+InsaneMultitasker]

In my test code I presume R2 (or memory location of your choosing) would subsequently be used to determine coincidence or 5th sprite flags (via ANDI or COCB / CZCB test). I revisited the 9918 manual and thought I'd share these snippets that may be of some use for the thread:

5.1.2 Register I (Contains Eight VDP Control Bits)

Bit 2 = IE (Interrupt Enable)
O-Disables VDP interrupt
1 -Enables VDP interrupt
If the VDP interrupt is connected in hardware and enabled by this bit, it will occur at the end of
the active screen display area, just before vertical retrace starts. [For our use, VDPINT is tied to the 9901].

Exceptionally smooth, clean pattern drawing and sprite movement can be achieved by writing to the VDP during the period
this interrupt is active. [i do not quite know what to make of this statement.]

5.2.1
The VDP Status Register contains the Interrupt Flag, Coincidence Flag, Fifth Sprite Flag, and
the Fifth Sprite Number (if one exists). Each of these is explained in the following paragraphs.

Interrupt Flag (F)
The F flag in the Status Register is set equal to 1 at the end of the raster scan of the last line of
the active display, just before the Backdrop color at the bottom of the screen begins. It is reset
to a 0 after the Status Register is read or whenever the VDP is externally reset (hardware
reset). If the Interrupt Enable bit located in VDP Register 1 is active (1), then the VDP interrupt
output line (INT) will be active (0) whenever the F status flag is 1. [read via 9901]

NOTE ¯
The Status Register needs to be read frame-by-frame in order to clear the interrupt
and receive the new interrupt for the next frame [e.g., read the status byte once per each 60th of a second]

5.2.2 Coincidence Flag ©
The C status flag will be set to a 1 if two or more sprites coincide. Coincidence occurs if any
two sprites on the screen have at least one overlapping pixel. Sprites set to the VDP color
transparent, as well as those partially or completely off the screen, are considered. Sprites
beyond the Attribute Table terminator of Hex DO are not considered. The C flag is cleared
whenever the VDP Status Register is read or the VDP is externally reset.
5.2.3 Fifth Sprite Flag (5S) and Number
The Fifth Sprite Flag is set to a 1 whenever there are five or more sprites active on a horizontal
line. The Fifth Sprite Flag is cleared to a 0 after the Status Register is read or whenever the
VDP is externally reset. The number of the lowest priority sprite on the horizontal line is
loaded into thee lower five bits of the Status Register whenever the Fifth Sprite Flag is set and
is valid whenever the Fifth Sprite Flag is a 1. The setting of the Fifth Sprite Flag will not generate
an interrupt.

[marc.hull]

Dang it.....

 

 

CLR R12
SBZ 0 INT MODE (might need to only set once at program start)
SBO 2
TMLP1 TB 2 VDP INT?
JEQ TMLP1 spin
SBO 2

 

 

I cannot get this thing to work. As it stands the console just free wheels with no throtteling. Changing the JEQ to JNE creates a hang up. I Have tried it on three NTSC consoles at this point. Either NTSC consoles are not what they seem or more likely I'm still missing something.

[+InsaneMultitasker]

It works for me on my PAL console. In Classic99 it returns immediately.

 

       REF	VWTR
       DEF	START

VDPST  EQU	>8802
	   
START  LIMI 0
       LI  R1,>0170     VDP Reg 1, Enable IE bit.(mode bits may vary)
       BLWP @VWTR
       CLR  R12         9901 base cru
       SBO  2           vdp int via 9901, enable
       LI   R1,60*10    duration in 60th of a second slice
 
WAIT1  CLR R12
WAIT2  TB   2           vdp interrupt? (via 9901)
       JEQ  WAIT2       no, spin and wait
       SBO  2           enable 9901 int (tests show this may not be needed)
       MOVB @VDPST,R2   read status to clear 9918 VDP Interrupt
       DEC R1           counter expired?
       JNE   WAIT1      no, tick off another 60th of a second
       BLWP @0
       
       END	START

 

It was pointed out to me that the VWTR routine uses R0, not R1. Sorry! Fortunately, it doesn't seem to impact the test as the interrupt bit default is 'enabled'.