Altirra + Rapidus (65816) + linear memory

[tebe]

How many colors can change Rapidus (21MHz) ?

 

p.s.

linear memory does not affect speed

rapidus_altirra.zip

[phaeron]

Careful, the emulator's 21MHz option is not the same as Rapidus. There are some significant differences in the memory model.

 

Altirra's high-speed emulation assumes a VBXE-like unified memory model where ANTIC has access to accelerator memory. This means that CPU reads and writes run at full speed, ANTIC reads take one CPU cycle, and hardware reads and writes require the CPU to synchronize to the 1.79MHz clock. That last part in particular means that the CPU can only write to hardware registers at most every other Atari cycle when using byte writes, since the CPU has to execute at least one non-hardware access cycle in between each write and that causes it to miss the beginning of the next Atari cycle. Word writes can do two write cycles in a row.

 

Rapidus uses a shadowed memory model where ANTIC is still running off of chip memory and the accelerator instead duplicates writes into it, using the fast memory as a write-through cache. This means that ANTIC reads don't cost any CPU cycles and potentially the CPU can do back-to-back hardware register writes if the accelerator has a posted write buffer that allows it. The write buffer implementation can make a lot of difference and some SVGA accelerators on PC got a large benefit from having just a single byte write buffer. I haven't been able to find source for the FPGA to confirm if this is the case or not. However, if I understand the design correctly, the tradeoff for slightly faster reads is that writes are bottlenecked by the available write bandwidth to chip memory, since all writes have to be reflected to the Atari side.

 

What this comes down to is that there's a lot more to accelerator performance than just the clock speed. All differences aside, though, the fundamental limitation of accelerators is that the accelerator can't overclock existing hardware to run at a faster speed... well, at least, not if you expect it to work. Any accesses to the original memory bus and hardware have to occur at 1.79MHz unless they're simulated or shadowed by the accelerator. That means that there are some generic rules that can be applied to any accelerator. One is that you shouldn't expect your code to run much faster or any faster at all if you run it directly from a fancy banked cartridge, because that cartridge is still running at 1.79MHz even if your CPU is running at 20MHz. The same goes for VBXE, which while it runs at 14MHz internally, still only has a 1.79MHz MEMAC interface.