Super Space II

[Bill R Sullivan]

Help!!  I bought one of these earlier this year knowing that the battery was dead, so I got them ordered, but not delivered by the time the SSII arrived.  The cart case was very hard for me to open, so I found an easier one to use while testing all aspects of operation.  The manual that came with it is in very good condition.  I haven't been able to check out the diskettes that were also included, as my SNUG TI-99/4P EVPC is broken, and my two TI-94/Al units only have a NanoPEB F-18A or NanoPEB V2 with a non-functional serial port.  My primary TI system is equipped with F-18A VGA and USB keyboard, so it shares (via K/V/M switch), 22" ACER monitor and USB wireless keyboard with my Dell Optiplex 7010 MT, Dell Latitude E6430 and Dell Latitude E6420 Laptop's via Dell E-port Plus docking stations, and networked over Gigabit Ethernet.  Only my Android Cellphone and HP printer are connected to my Linksys EA7500 via WIFI; all the other connect via 8 port Gigabit switch, so very secure.

 

Back to the SSII problems: I immediately had bank switching problems, so I could only use bank 0 for one BCART TI Basic program.  Of course, in the case of my 80K MG GK I could MSAVE up to 40K of TI Basic programs in GRAMS 3-6, and if the two RAM banks of my GK worked I could have two BCART programs also.  Anyway, I studied the SSII manual, and discovered that the strapping options were incorrect, so I changed them.  Bad decision, as now it didn't work at all, so I changed them back, but it was now non-operational!  I rechecked the settings-correct as they were, but according to the manual's chart, the installed IC must be a 32K x 8!  With a very strong light and magnification, I could see that it was a Mitsubishi M5M5256P-15, which is a 32K x 8 or 256K CMOS RAM IC!  I went on-line and ordered 3 each HM62256LP-15, the specific IC described in the SSII manual for the required 8K x 4 or 32K total CMOS RAM.

 

I received them a few weeks ago, but have been too busy to install and test them until a few days ago.  I carefully removed the M5M5256P-15 before resetting the strapping options for the HM62256LP-15.  I also carefully (not touching any of the pins) put it in the socket, but all the preliminary tests failed, and I could not load the primary TI Basic program into the BCART configured bank 0.  Same results for the second HM62256LP-15!  Right now I'm looking at the packing list for these 3 IC chips, which states that; they are Hitachi HM62256LP-15, and below that it also states they are Standard SRAM 32K x 8 150NS CMOS DIP-28 low power!  Can some one here please tell me what's going on, and how the hell is one suppose to purchase correct parts when the manufacturer's designation is applicable to two very different IC chips?  Or does it depend on where they are manufactured?  As the packing list also states they are new and have a 2 year warranty.  I have already arranged to return them for a full refund, and they pay return shipping costs.

 

Please help, if you can.

 

fdos

[+OLD CS1]

The SuperSpace cartridges use CRU for bank-switching.  That could be the problem versus a bad cartridge.  Also, if you have a QI motherboard, it lacks CRU signals at the cartridge port.

[GDMike]

I have a supercart that accepts either, an 8K SRAM or a 32K SRAM.

I have to physically switch the banks myself via the two set of switches.

I have a program that allows me to erase a full bank, whichever the switches are set for, but with an 8K there's only the one bank, but my program can place 0's in all addresses, or '1's or whatever I placed in the last bank with a manual load with basic.

Then I can DBL check my an option in the program that displays the actual data.

Now with all that said, what I really want to say, is I've gone through a few chips just to get a tolerable SRAM, because I've definitely found bad chips - I've got two buckets, one bucket has ram that contains errors. And guess where I'm finding the errors? Bank 0 byte 0 meaning the first byte that always get written and read over and over more than other byte locations.

Why do I keep them? Because all other bytes, (addresses) read and write just fine.  So I hang on ... maybe I can use them someday and note to read and write to the next address over and just skip address 0.

My 2 cents

Edited November 1, 2020 by GDMike

[Bill R Sullivan]

On 10/31/2020 at 5:43 PM, OLD CS1 said:

The SuperSpace cartridges use CRU for bank-switching.  That could be the problem versus a bad cartridge.  Also, if you have a QI motherboard, it lacks CRU signals at the cartridge port.

Yes I know they do, and I've been using HOME AUTOMATIONS fdoso or fdos_o CALL LINK("BANK", 0 or 8 or >30 or >80) to do it, but neither have been successful.

 

Oops! No QI motherboards in any of my old TI-99/4A consoles.

Edited November 2, 2020 by Bill R Sullivan
Missing one response.

[Bill R Sullivan]

On 11/1/2020 at 8:46 AM, GDMike said:

I have a supercart that accepts either, an 8K SRAM or a 32K SRAM.

I have to physically switch the banks myself via the two set of switches.

I have a program that allows me to erase a full bank, whichever the switches are set for, but with an 8K there's only the one bank, but my program can place 0's in all addresses, or '1's or whatever I placed in the last bank with a manual load with basic.

Then I can DBL check my an option in the program that displays the actual data.

Now with all that said, what I really want to say, is I've gone through a few chips just to get a tolerable SRAM, because I've definitely found bad chips - I've got two buckets, one bucket has ram that contains errors. And guess where I'm finding the errors? Bank 0 byte 0 meaning the first byte that always get written and read over and over more than other byte locations.

Why do I keep them? Because all other bytes, (addresses) read and write just fine.  So I hang on ... maybe I can use them someday and note to read and write to the next address over and just skip address 0.

My 2 cents

In my case I use CRU switching for the Super Space II, but so far no success.  I don't know if it's an IC or switching method problem.  There is another way to do it using Super Bug that would determine if the bank switching (fdoso or fdos_o) is or isn't the problem.  I may have tow write my own, but I haven't done any AL coding in years, and I just don't have time for it anyway.

 

fdos

[GDMike]

I'm not sure how noise is handled with that, mine gets noise on any bank that is left "on" as I shut down or power up. I'm not sure if it's on up or down or both.

 

[Bill R Sullivan]

3 minutes ago, GDMike said:

I'm not sure how noise is handled with that, mine gets noise on any bank that is left "on" as I shut down or power up. I'm not sure if it's on up or down or both.

 

When it was working for bank 0 only, I did not experience any noise problems.  When I shut down for the night, I always remove any battery backed module from the TI (SuperCart, Super Space II, and MG GramKracker), and they are always good the next day.  Except for the non-functional Super Space II, of course.

 

fdos