1090XL remake

[+MrFish]

7 hours ago, reifsnyderb said:

Current "crop" of working 1090XL (reproduction) and 1091XL boards.

These things look great!

 

Is there any outlook for producing boxes for them?

 

[reifsnyderb]

51 minutes ago, MrFish said:

Is there any outlook for producing boxes for them?

The cost of the tooling to make the metal boxes would be awful.  It's probably more reasonable to 3d print them, unfortunately. 

[+MrFish]

7 minutes ago, reifsnyderb said:

The cost of the tooling to make the metal boxes would be awful.  It's probably more reasonable to 3d print them, unfortunately. 

3D printing is fine. I was more curious if anything was in the works yet or not.

 

[Geister]

I'm thinking that if 1090s exist and follow a standard that other cards like the VBX_ video card might converted to the 1090 and get wider support as an alternative to the 80 column card much like the VGA was an alternative to the CGA/EGA or Hercules cards for the PC.  Maybe the Ultimate 1 MB could be produced as a plug in card as well.

 

[reifsnyderb]

3 minutes ago, Geister said:

I'm thinking that if 1090s exist and follow a standard that other cards like the VBX_ video card might converted to the 1090 and get wider support as an alternative to the 80 column card much like the VGA was an alternative to the CGA/EGA or Hercules cards for the PC.  Maybe the Ultimate 1 MB could be produced as a plug in card as well.

 

I am all for that!   🙂

 

[reifsnyderb]

58 minutes ago, MrFish said:

3D printing is fine. I was more curious if anything was in the works yet or not.

 

Nothing in the works, for a case, yet.  For a 3d printed case, I suppose we'd just need some general dimensions as there is so much that would have to be different.  I'd say we should have all of the outside dimensions of the box and dimensions of the card "tab" hole.  Otherwise, everything would be somewhat different due to the use of plastic.

[_The Doctor__]

adapter carrier cards maybe

[reifsnyderb]

Update on the 4MB 1090 card.

 

Well, the good news is that I got most of it working.  I say most of it because there is still some debugging required where the optional main memory is concerned.  (I made the main memory optional so as to allow the card to be used stand-alone or with another memory card.)

 

Now the bad news....

I couldn't get the card to bank on the Axlon register of $CFFF.  I couldn't understand why it wouldn't work when all the signals looked fine on the schematic.  I didn't put a scope on it, though, as it can be really hard (as in almost impossible) to catch the right signal at the right time.  After some thought, and lots of testing, I started to wonder if $CFFF would never work on an XL as the MMU would also be enabling the ROM and there could be bus contention.  So, as a test, I changed the decoder to decode the address to $D1FE and it works.  I can use $D1FE to bank the memory and have 4MB available.  ($D1FE is actually reserved, by Atari, as a banking address for 1090 cards.)  However, there is nothing that uses $D1FE to bank the memory as the 1090 was never released.  Also, using $D1FE to bank, like the Axlon register banks, breaks Atari's banking design for $D1FE.  (The 1090 1066 card uses $D1FE for banking.)

 

So, in summary, 4MB can be available via the 1090 but using the Axlon register is a no-go.   😞

 

 

Edit to add:  Writing to a ROM address is possible, on an 800 (i.e.  Mosaic banking), so I figured this would work, too.

 

Edited August 10, 2023 by reifsnyderb

[+kheller2]

The Antonia board did Axlon emulation but I think it took over the MMU as well.

[reifsnyderb]

1 hour ago, kheller2 said:

The Antonia board did Axlon emulation but I think it took over the MMU as well.

I just checked on the Antonia board and it swaps out the CPU and MMU.  Once the MMU is controlled, at lot more is possible.  It's too bad the MMU can't be disabled similar to the PBI MPD signal.

[Mathy]

Hello Brian

 

How did the MIO do it?

 

Sincerely

 

Mathy

 

[reifsnyderb]

25 minutes ago, Mathy said:

Hello Brian

 

How did the MIO do it?

 

Sincerely

 

Mathy

 

I don't see any evidence the MIO provided any extended memory to the computer.  I only found this reference in the Altirra Hardware Manual:

 

$D1FC RAM bank A8-A15 (write-only)
Controls the eight of the bank address bits for the MIO memory window at $D600-D6FF. The banking value
cannot be read back.

 

That's only 2k of memory.

 

 

 

Edit to add:  I found this page...   http://krap.pl/mirrorz/atari/www.dropmail.com/MIO/Chapter1.shtml

 

It appears the MIO could handle a RAM disk and/or print spooler.  I am assuming a special handler is required.

 

2nd edit:  I found this, too....   http://krap.pl/mirrorz/atari/www.dropmail.com/MIO/Chapter5.shtml

 

So, all of the RAM can be accessed via the $D6xx window.

 

I suppose it wouldn't be too hard to write a handler to use this 4MB card to function as a RAMDISK and/or print spooler.   <shrug>

 

As far as a printer spooler is concerned, I already have a card designed and need to figure out the handler some day.  It has a 128k chip onboard with 1k banks at the 2nd half of the $D800-$DFFF window.

 

 

 

Edited August 10, 2023 by reifsnyderb

[_The Doctor__]

Both the MIO and the Black BOX are PBI devices that provide print spoolers.

They also can swap memory with PBI rom contents and vice versa

 

I think Mathy was also referring to the MIO being able to provide cache memory etc, was it Craig Carter or someone else that wrote software for that? I can't remember. Any way Len Spencer did some work on speeding up the MIO and BB as well.

ICD was to have an 80 Column card and PBI memory available, but 80 column card w/crt9007 chip appears lost to time.

 

Craig Carters cache driver is here, and you can find leonard spencers serial stuff at his site or all the archives and AA

Edited August 10, 2023 by _The Doctor__

[Mathy]

Hello Brian

 

The MIO came in two flavors: 256kB and 1MB.  Later, Metalguy66 did a redesign that could, if memory doesn't fail me (no pun intended), access 16MB.  The procedure to access this memory, whether it be 256kB, 1MB or 16MB, might be usable in the 1090.  That's what I meant.

 

Sincerely

 

Mathy

 

[reifsnyderb]

On 8/10/2023 at 11:10 AM, reifsnyderb said:

Update on the 4MB 1090 card.

 

Well, the good news is that I got most of it working.  I say most of it because there is still some debugging required where the optional main memory is concerned.  (I made the main memory optional so as to allow the card to be used stand-alone or with another memory card.)

 

Now the bad news....

I couldn't get the card to bank on the Axlon register of $CFFF.  I couldn't understand why it wouldn't work when all the signals looked fine on the schematic.  I didn't put a scope on it, though, as it can be really hard (as in almost impossible) to catch the right signal at the right time.  After some thought, and lots of testing, I started to wonder if $CFFF would never work on an XL as the MMU would also be enabling the ROM and there could be bus contention.  So, as a test, I changed the decoder to decode the address to $D1FE and it works.  I can use $D1FE to bank the memory and have 4MB available.  ($D1FE is actually reserved, by Atari, as a banking address for 1090 cards.)  However, there is nothing that uses $D1FE to bank the memory as the 1090 was never released.  Also, using $D1FE to bank, like the Axlon register banks, breaks Atari's banking design for $D1FE.  (The 1090 1066 card uses $D1FE for banking.)

 

So, in summary, 4MB can be available via the 1090 but using the Axlon register is a no-go.   😞

 

 

Edit to add:  Writing to a ROM address is possible, on an 800 (i.e.  Mosaic banking), so I figured this would work, too.

 

Thinking more about this....

 

There are some options:

 

1.  Modify the 4MB board to use a special banking register.  (i.e.  Use one of Atari's unused but reserved $D1xx PBI addresses.)  Then ask the SDX guys if they could extend SDX to handle this register similar to the Axlon register.  (It is also possible to use $D1FE to bank this board, however, $D1FE is used to bank the reproduction 1066 card and the banking configuration is different than Axlon.)

2.  Modify the 4MB board to use a special banking register.  (i.e.  Use one of Atari's unused but reserved $D1xx PBI addresses.)  Then ask the SDX guys if they could extend SDX to handle this register similar to the Axlon register.  (It is also possible to use $D1FE to bank this board, however, $D1FE is used to bank the reproduction 1066 card and the banking configuration is different than Axlon.)  Remove the base memory so as to simplify the board.  (This is the simplest option.)

3.  Add a ROM to the 4MB board.  Then add RAM disk firmware so that it's a plug and play 4 MB RAM disk.  Remove the base memory memory as there won't be space for the base memory and ROM.  In this configuration, the banking would only be possible if the board is set active via $D1FF.  (This is the most complicated option.)

4.  Add a ROM to the 4MB board.  Then add RAM disk firmware so that it's a plug and play 4 MB RAM disk.  Remove the base memory memory as there won't be space for the base memory and ROM.  Assign a specific register to bank the board.  (i.e.  One of Atari's unused but reserved $D1xx PBI addresses.)  If the ROM is disabled (or removed), an external handler or SDX (if modified), could bank the memory.

 

I am leaning towards option 4.  Other suggestions are welcome.

 

 

 

 

 

 

[invisible kid]

If this were being developed back in the day, would they go route #2? It sounds like that was the original intent? If so, I would consider going this route, but I also know it can be difficult/impossible to coordinate these things. Either way, great job on developing this!

[reifsnyderb]

1 hour ago, invisible kid said:

If this were being developed back in the day, would they go route #2?

I think so.  However, back in the day they didn't have 1 MB SRAMs.  🙂

1 hour ago, invisible kid said:

It sounds like that was the original intent?

Originally, Atari had the 1066 board.  The 1066 board had 64k of DRAM and could be configured as either main memory or banked memory.  The 1066 appears that it could also have been used as the main memory for a Z-80 card.  Also, the 1066 had an extra socket that, while missing the ground, could have been used for an extra chip so as to allow 256k DRAMs on the board.  ( @ClausB provided the instructions on this. ) $D1FE was reserved to bank the 1066.  @kenames99 developed the reproduction of the 1066 card.

1 hour ago, invisible kid said:

If so, I would consider going this route, but I also know it can be difficult/impossible to coordinate these things.

While coordination is good, I am seriously considering option 4 so as to permit the board to be used stand-alone.  I could also add a jumper to disable the ROM in the event the capability is added to SDX or another system.

1 hour ago, invisible kid said:

Either way, great job on developing this!

Thanks!

[+scorpio_ny]

On 8/10/2023 at 11:10 AM, reifsnyderb said:

Now the bad news....

I couldn't get the card to bank on the Axlon register of $CFFF.  I couldn't understand why it wouldn't work when all the signals looked fine on the schematic.  I didn't put a scope on it, though, as it can be really hard (as in almost impossible) to catch the right signal at the right time.  After some thought, and lots of testing, I started to wonder if $CFFF would never work on an XL as the MMU would also be enabling the ROM and there could be bus contention.  So, as a test, I changed the decoder to decode the address to $D1FE and it works.  I can use $D1FE to bank the memory and have 4MB available.  ($D1FE is actually reserved, by Atari, as a banking address for 1090 cards.)  However, there is nothing that uses $D1FE to bank the memory as the 1090 was never released.  Also, using $D1FE to bank, like the Axlon register banks, breaks Atari's banking design for $D1FE.  (The 1090 1066 card uses $D1FE for banking.)

 

So, in summary, 4MB can be available via the 1090 but using the Axlon register is a no-go.   😞

 

 

Edit to add:  Writing to a ROM address is possible, on an 800 (i.e.  Mosaic banking), so I figured this would work, too.

 

By the way, thank you for all your hard work! It is appreciated!

 

Would it possible to swap in a custom programmed MMU via a GAL chip that resides either on the board or fed to the host computer via ribbon from expansion chassis for more control?

 

Also, with the RAM disk, would there be a coin battery to preserve the contents? 

[reifsnyderb]

26 minutes ago, scorpio_ny said:

Would it possible to swap in a custom programmed MMU via a GAL chip that resides either on the board or fed to the host computer via ribbon from expansion chassis for more control?

To save board space, I have two ATF16V8's on the board already.  One acts as a decoder to decode $D301 and $D1FE (originally $CFFF).  The other is configured as a registered device to do a lot of functions.  I'll have to re-purpose them.  Normally, I have the first one configured as a decoder and the second one handling some other functions.

 

26 minutes ago, scorpio_ny said:

Also, with the RAM disk, would there be a coin battery to preserve the contents? 

Space is pretty tight.  Also, a RAM controller chip socket would have to be added.  (These chips are stupidly expensive, too.) The battery could probably be located on the reverse side.  I'll give it some thought.  If such a feature was added, it may be possible to boot from the RAM disk.

[+scorpio_ny]

Thanks @reifsnyderb! With such a large amount of RAM and depending on how it is used, one would have to keep copying data to it every power up to use it as a disk. Also, because of the banking scheme used , I am assuming it would not be compatible with existing games and/or other software that was written to take advantage of extra RAM using the banking scheme of either the XL/XE series or Atari 400/800 series.

 

[Mathy]

Hello Brian

 

Option 5: address (4Mb out of) 16MB just the way the redesigned MIO addresses its memory.

 

Sincerely

 

Mathy

 

[+kheller2]

3 hours ago, Mathy said:

Hello Brian

 

Option 5: address (4Mb out of) 16MB just the way the redesigned MIO addresses its memory.

 

Sincerely

 

Mathy

 

With battery/power backup for booting from the ram disk.  
 

one needs to experience the flexability and ram disks of the MIO to understand how wonderful it can be. 

[reifsnyderb]

On 8/12/2023 at 7:32 PM, Mathy said:

Hello Brian

 

Option 5: address (4Mb out of) 16MB just the way the redesigned MIO addresses its memory.

 

Sincerely

 

Mathy

 

Hello,

 

Thinking this through, the downside is that MIO addressed it's memory through a 256 byte window.  Did the redesigned MIO do this differently?  Right now I am using the usual 16k window.  With the RD (RAM Disable) feature on the modernized 1090/1 the 4MB can even take over the RAM from a compatible RAM expansion card.  So, I don't think using the normal 16k window will be a problem except with an original 1090XL.

 

Edit to add:  Adding another addressed region would also take up more real estate on the board.  Right now, the board size is at it's limit to fit a 1091.

 

Best Regards,

 

Brian

 

 

 

 

 

Edited August 14, 2023 by reifsnyderb

[reifsnyderb]

After some more thought about the 4MB board, it appears it would be only usable as a RAM disk, with possibly a decent print spooler.  I am concerned about board real-estate as it's pretty tight already.  Removing the base memory will free up some space.  Adding a ROM chip and battery back-up chip may take up too much space for a 1091.  I'll have to try to lay it out and find out.

 

I don't think the code to use the board for a RAM disk will be much of a problem.  Since there isn't a ROM on the board, I can configure the current 4MB board to just use one of Atari's reserved banking addresses, another address to enable the banking, and run the ROM off of a firmware board.  So the current board won't be a total waste for R&D purposes.

[reifsnyderb]

Given the size of the 4MB board, and that it can't be used as an Axlon board as envisioned, Now we are discussing using it as a RAM disk but with a battery back-up.  Basically a battery-backed RAM drive.  I already have a 1090/1 board developed that uses most of the logic from the 80 column board and a Raspberry Pi Pico.  The Raspberry Pi Pico is now connected to an SD card reader.  (The only problem, thus far, is that the SD card reader foot print is backwards....but it should be usable for development purposes.)  Since this SD card 1090 board has a more reasonable footprint, was designed to be used as a "drive", and would be a lot cheaper to make than the 4MB board, I am thinking it makes more sense to get the SD card board working instead.  The main "downside" will be that the SD card board functions via a serial type connection as opposed to at full speed of the 4 MB board.  If the only purpose of the 4MB board is to act as a RAM Drive, the SD card board may make more sense.