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Happy Warp 1050 7.1 Schematic


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7 hours ago, DjayBee said:

Does this mean that any software using this RAM area will play havoc with the write protection and (however this happens) the overflow flag of the CPU?

IIRC, the extra 2K address space ($9800) affects only the V flag, not the write protection. The latter is read by accessing the $4000 area.

 

Since long ago I wondered about this possible conflict. And as a matter of fact, I always tried to avoid using the extra 2K ram in the few Happy programs I developed. But I think that @phaeron is right, the chances in practice for actually generating a conflict are very low.

 

I think @Gregf mentioned they sometimes used the extra 2K for inhouse stuff. May be he remembers if they considered the possible conflict with the Happy Controller board. @Gregf?

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4 hours ago, ijor said:

IIRC, the extra 2K address space ($9800) affects only the V flag, not the write protection. The latter is read by accessing the $4000 area.

According to the schematic, reading the slow/fast switch through $9800 also clears the write protect invert flip flop to restore normal write protect sensing. That's assuming the schematic is correct there, of course. It definitely has the flip flop clocks swapped, I double-checked the firmware and it uses $9800 to access the slow/fast switch and $4000 to toggle WP:

 

        CLV                 ;clear overflow flag
        LDA     $9800       ;clock slow/fast control flip-flop to toggle SO (set overflow) four times
        LDA     $9800
        LDA     $9800
        LDA     $9800
        LDA     $9702       ;get flags
        PHP                 ;save slow/fast flag
        AND     #$18        ;mask to WP force off/on bits
        BEQ     LF125       ;skip if we're not forcing WP
        BIT     $0400       ;read FDC status
        BVC     LF11E       ;jump if not write protected
        AND     #$10        ;check if WP should be forced on
        BNE     LF125       ;jump if we're good
        BEQ     LF122       ;we're not good -- toggle state

LF11E   AND     #$08        ;check if WP should be forced off
        BNE     LF125       ;jump if not
LF122   LDA     $4000       ;toggle write protect control
LF125   PLA                 ;get saved flags
        AND     #$40        ;mask to overflow (slow/fast) flag
        TAX
        EOR     $96E7       ;check for change in mode
        BEQ     LF181       ;skip if not
        STX     $96E7       ;update mode

 

I think if the clear function is not present on $9800, the firmware can fail to undo the WP override after it has been cleared, because it will just hit $9800 x 4 and then skip checking WP.

 

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Hello,
 

Have not read this tread fully.

However, here's my schematics of Happy's. (With a track display, but that's irrelevant)

All of these versions do work, I've also made PCB's and build a few.

 

As for write protect on the floppy, the drives I know (Shugart bus) have a write protect that cannot be influenced by any program in a floppy controller.

So the write protect on the disk activated/deactivates a signal that's commonly called "write gate".

If inactive, the write amplifier to the head is deactivated.

If I remember correctly, this mechanism is also in the 1050 hardware.

 

The extra Ram on the PCB consisted of 3 pieces 2K ram in the very first PCB's.

Once the 8K ram became available and affordable, this was used.
BR/

Guus Assmann

HAPPY2.pdf HAPPY2a.pdf HAPPY4.pdf

Edited by guus.assmann
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7 hours ago, phaeron said:

According to the schematic, reading the slow/fast switch through $9800 also clears the write protect invert flip flop to restore normal write protect sensing. That's assuming the schematic is correct there, of course. It definitely has the flip flop clocks swapped, I double-checked the firmware and it uses $9800 to access the slow/fast switch and $4000 to toggle WP: ...

I think you are right. I don't remember very well. But it is possible that I didn't care about the WP issue because my Happy drives were always jumpered for not allowing a software override, only the switch position could alter the WP state. So I only considered the V flag issue.

 

Quote

Clearing the write protect flip-flop only has an effect if the firmware has inverted the WP state, and there may not be any code affected by the V flag. (I am not sure I have ever written any code using it, outside of CPU tests.)

 

Btw, I forgot to comment about this. It is true that using the V flag for arithmetic purposes is very rare, at least for software that runs inside the drive. But it is very common to use the V flag with the BIT instruction, and as a matter of fact, it is used by the the firmware. Then, in theory, it is possible that software accessing the $9800 area after executing the BIT instruction might misread the V flag.

 

7 hours ago, guus.assmann said:

As for write protect on the floppy, the drives I know (Shugart bus) have a write protect that cannot be influenced by any program in a floppy controller.

We are not talking about the FDC. We are talking about the Happy Controller board. That was an optional add on that actually intercepts the write protect signal going to the drive mechanism.

 

Edited by ijor
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8 hours ago, guus.assmann said:

Hello,
 

Have not read this tread fully.

However, here's my schematics of Happy's. (With a track display, but that's irrelevant)

All of these versions do work, I've also made PCB's and build a few.

 

As for write protect on the floppy, the drives I know (Shugart bus) have a write protect that cannot be influenced by any program in a floppy controller.

So the write protect on the disk activated/deactivates a signal that's commonly called "write gate".

If inactive, the write amplifier to the head is deactivated.

If I remember correctly, this mechanism is also in the 1050 hardware.

 

The extra Ram on the PCB consisted of 3 pieces 2K ram in the very first PCB's.

Once the 8K ram became available and affordable, this was used.
BR/

Guus Assmann

HAPPY2.pdf 58.31 kB · 2 downloads HAPPY2a.pdf 60.88 kB · 1 download HAPPY4.pdf 63.08 kB · 4 downloads

A comparison of these schematics, and the 7.1 schematics, confirms my belief as to the connection of U4, pin 12 on the 7.1 schematics.   🙂

 

Here's the modernized schematic for the board I came up with:

 

 

schematic.thumb.png.1ef53b9f026237788c1a854e8db55320.png

 

Edit to add:  After a little reflection, I connected the AS6C1008 CE2 to Phi2 and updated the schematic.

 

 

 

 

Edited by reifsnyderb
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  • 3 weeks later...

Ok.  Follow-up....

 

First the good news:

 

Installing the Happy 7.1 board I made up appears to work.  Well, I need to test it more but it loads MULE lightening fast.  I mean really, really fast.  🙂   (I am also running the OS 6.1, on my 600XL, with the @HiassofT 's high speed SIO patch.)  So there's no longer time for a bathroom break while it's loading.  I do need to do more testing as I didn't try to write anything.  But, since I am using the following ROM, I think it's good to go.  It's working with modern chips, too.  Nothing is no longer made.  No scrounging chips from ebay, etc.  Even the W65C02 processor appears to be working fine.

 

Happy1050-Rev2-Nezgar F76EAE16.bin

 

Here's some pics:

 

1319699675_topwochips.thumb.jpg.d97cd1729f283c5767f8b40a160665d1.jpg

 

1863535346_topwchips.thumb.jpg.35fdfb586c0b06ff032ad9666a3724ff.jpg

 

bottom.thumb.jpg.007e3fb2c8f3634b24e8c92c8be4b57b.jpg

 

So, this board should work with a "normal" 6502 as well.  A 39SF020A or 39SF040A could also be substituted for the flash ROM chip.

 

 

Now the bad news.  Some will probably, and understandably laugh.  I don't know whether to laugh, cry, throw things, or go drink a beer.  (Maybe all 4?)  From my perspective, this is just another testament to not being able to get something right the first time.  Take a look at the Socket (S1) in the above two pictures.  This is where you plug this board into the 6507 socket on the 1050 board.  For those that aren't familiar with the 1050 circuit board, take a look at the picture here:  https://atariprojects.org/2018/09/16/install-the-happy-enhancement-for-the-1050-disk-drive-45-60-mins/

 

So, to get this to work, I accidentally designed the board with the 6507 pinout upside down.  I have to install the $@%%@ board upside down for it to work.  (Fortunately, I caught this when installing the board.)

<sigh>

 

 

 

 

 

 

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7 minutes ago, _The Doctor__ said:

component side down / flipped / rotated ?

the pins are still on the non component side in you picture...

 

No.  Component side up.  Just with the board rotated 180 degrees so that the text is upside-down when looking at the board from the front of the 1050. 

 

 

 

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1 minute ago, _The Doctor__ said:

If it fits under the shielding, just the silk screen need be changed, if it does not fit under the shielding, I guess you would play the change the lay out game.

It wouldn't fit under the shielding because there is a crystal, on the 1050 board, in the way.  Actually, I bought some 28 pin sockets so as to use to protect the original sockets.  This is because my experience has been that adding boards, in this fashion, expand the original sockets.  So, to revert back to the original chips, I'd have to replace the sockets.  So, I have a new socket plugged into the original socket and my board installed above that.  The original sockets are safe.  🙂  This also had the advantage, that with this screw-up, the board is raised above the crystal.  So, everything clears as long as the shield isn't installed.

 

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30 minutes ago, reifsnyderb said:

Some will probably, and understandably laugh.  I don't know whether to laugh, cry, throw things, or go drink a beer

I can relate. :)  

IMG_6738_Original.thumb.jpeg.abf2bec15d2074deb321c8ff8ceba7e7.jpeg

(Go have a beer. Have a second. Revise the board tomorrow and order another run). 

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1 hour ago, reifsnyderb said:

Now the bad news.  Some will probably, and understandably laugh.  I don't know whether to laugh, cry, throw things, or go drink a beer.  (Maybe all 4?)

...

So, to get this to work, I accidentally designed the board with the 6507 pinout upside down.

I'd say a couple of Foster's (or some other beers from down-under) would be a good choice in that case 🙂

 

And don't worry, pretty much everyone who's into electronics (me included) has done similar stupid mistakes.

 

so long,

 

Hias

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Well, since it works, the circuit is verified.  I'll use another upside-down board to upgrade my 2nd 1050.  I have a 6502B sitting here and can use it to confirm that a standard 6502 works as well.

 

After thinking this through, I doubt I can just rotate the socket pins and re-connect the traces.  (I'll try it, first.)  My belief is that the entire board will have to be redone as all of the chips were positioned so as to reduce the length and complexity of the traces.  Then, when I order new boards I'll get board that are fixed.

 

I'll also use these upside-down (un) happy boards to test the OS improvements.

 

 

Edit to add:

 

My 2nd 1050 is now upgraded and the board works with a 6502B as well.   🙂

 

 

Edited by reifsnyderb
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I saw a picture of a version that had a hole for the crystal.  Since I know that my un-happy board works fine in this orientation, I modified the design so the crystal will poke through.  The RAM was moved to the right and R1 was moved to the bottom left.  All of the silk screen was rotated.  The crystal will also act like a "key" so the board can't be installed upside down.  Here's a rendering.  I'll get some made the next time I get boards made.  Given the measurements I just took, this should fit in the shield, depending on how it's installed.  (i.e.  Just force the 6507 pins, on this board, into the 6507 socket.) 

 

1405501082_toprendering.jpg.b7773990a2831e8a0ac64d5793dddefe.jpg

Edited by reifsnyderb
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1 hour ago, Larry said:

When you get finished with the development, do you plan on selling these? Is it possible to socket the chips? (I don't think that I've ever had a Happy 1050 where the shielding could be used.)

Hello,

 

I've got to get a minimum order of 5 boards when ordering, so I'll put some extras out for sale.  The 6502 and flash memory chip are both socketed.  The other chips are surface mount.  Four of the surface mount chips were installed under the socketed chips so as to save board space.  I might be wrong about fitting under the shielding...if the board sits too high.  I think it will work.  My installation is too high as I didn't want to ruin the original socket by shoving the pins in it.  So, I stacked a socket on top of the original socket and shoved the Happy pins in that.

 

Best Regards,

 

Brian

 

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1 hour ago, _The Doctor__ said:

or fix the bug ;)

Does anyone have the firmware disassembled so it could be tried?  (I just tried a disassembly and it looks like the firmware may have been written to make a disassembly miserable.  But, I could be wrong as I've never seriously tried before.)

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On 5/23/2023 at 2:50 AM, phaeron said:

According to the schematic, reading the slow/fast switch through $9800 also clears the write protect invert flip flop to restore normal write protect sensing. That's assuming the schematic is correct there, of course. It definitely has the flip flop clocks swapped, I double-checked the firmware and it uses $9800 to access the slow/fast switch and $4000 to toggle WP:

 

        CLV                 ;clear overflow flag
        LDA     $9800       ;clock slow/fast control flip-flop to toggle SO (set overflow) four times
        LDA     $9800
        LDA     $9800
        LDA     $9800
        LDA     $9702       ;get flags
        PHP                 ;save slow/fast flag
        AND     #$18        ;mask to WP force off/on bits
        BEQ     LF125       ;skip if we're not forcing WP
        BIT     $0400       ;read FDC status
        BVC     LF11E       ;jump if not write protected
        AND     #$10        ;check if WP should be forced on
        BNE     LF125       ;jump if we're good
        BEQ     LF122       ;we're not good -- toggle state

LF11E   AND     #$08        ;check if WP should be forced off
        BNE     LF125       ;jump if not
LF122   LDA     $4000       ;toggle write protect control
LF125   PLA                 ;get saved flags
        AND     #$40        ;mask to overflow (slow/fast) flag
        TAX
        EOR     $96E7       ;check for change in mode
        BEQ     LF181       ;skip if not
        STX     $96E7       ;update mode

 

I think if the clear function is not present on $9800, the firmware can fail to undo the WP override after it has been cleared, because it will just hit $9800 x 4 and then skip checking WP.

 

Where did you get the firmware disassembly?

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